LPC1830FET256 datasheet(10/84 Pages) NXP

Part #	LPC1830FET256

Description	32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD

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Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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10 / 84 page

LPC1850_30_20_10

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Objective data sheet

Rev. 1 — 3 January 2011

10 of 84

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

P2_5[3]

K14

<tbd>

-

n.c.

I

CTIN_2 — SCT input 2. Capture input 2 of timer 0.

I

USB1_VBUS — Monitors the presence of USB1 bus power.

Note: This signal must be HIGH for USB reset to occur.

I

ADCTRIG1 — ADC trigger input 1.

P2_6[2]

K16

<tbd>

-

n.c.

I/O

U0_DIR — RS-485/EIA-485 output enable/direction control for USART0.

I/O

EXTBUS_A10 — External memory address line 10.

O

USB0_IND0 — USB0 port indicator LED control output 0.

P2_7[2]

H14

I; PU

I/O

GPIO0[7] — General purpose digital input/output pin. This pin is sampled at

RESET for ISP entry.

O

CTOUT_1 — SCT output 1. Match output 1 of timer 0.

I/O

U3_UCLK — Serial clock input/output for USART3 in synchronous mode.

I/O

EXTBUS_A9 — External memory address line 9.

P2_8[2]

J16

<tbd>

-

n.c.

O

CTOUT_0 — SCT output 0. Match output 0 of timer 0.

I/O

U3_DIR — RS-485/EIA-485 output enable/direction control for USART3.

I/O

EXTBUS_A8 — External memory address line 8. Boot control pin 2 (see

Table 5).

P2_9[2]

H16

I; PU

I/O

GPIO1[10] — General purpose digital input/output pin.

O

CTOUT_3 — SCT output 3. Match output 3 of timer 0.

I/O

U3_BAUD3 — <tbd>for USART3.

I/O

EXTBUS_A0 — External memory address line 0.

P2_10[2]

G16

I; PU

I/O

GPIO0[14] — General purpose digital input/output pin.

O

CTOUT_2 — SCT output 2. Match output 2 of timer 0.

O

U2_TXD — Transmitter output for USART2.

I/O

EXTBUS_A1 — External memory address line 1.

P2_11[2]

F16

I; PU

I/O

GPIO1[11] — General purpose digital input/output pin.

O

CTOUT_5 — SCT output 5. Match output 1 of timer 1.

I

U2_RXD — Receiver input for USART2.

I/O

EXTBUS_A2 — External memory address line 2.

P2_12[2]

E15

I; PU

I/O

GPIO1[12] — General purpose digital input/output pin.

O

CTOUT_4 — SCT output 4. Match output 0 of timer 1.

-n.c.

I/O

EXTBUS_A3 — External memory address line 3.

P2_13[2]

C16

I; PU

I/O

GPIO1[13] — General purpose digital input/output pin.

I

CTIN_4 — SCT input 4. Capture input 2 of timer 1.

-n.c.

I/O

EXTBUS_A4 — External memory address line 4.

Table 3.

Pin description …continued

Symbol

Reset

state

[1]

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LPC1830FET256 Datasheet(PDF) 10 Page - NXP Semiconductors

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