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ADP5587ACPZ-R7 Datasheet(PDF) 8 Page - Analog Devices

Part No. ADP5587ACPZ-R7
Description  Mobile I/O Expander and QWERTY Keypad Controller
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADP5587ACPZ-R7 Datasheet(HTML) 8 Page - Analog Devices

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ADP5587
Rev. B | Page 8 of 24
THEORY OF OPERATION
CONTROL
REGISTERS
CONTROL
INTERFACE
C9
C8
A0
A1
A2
A3
A4
A5
A6
A7
B0
B1
B2
B3
B4
B5
B6
B7
C0
C1
C2
C3
C4
C5
C6
C7
D0
D1
D2
D3
D4
D5
D6
D7
E0
E1
E2
E3
E4
E5
E6
E7
F0
F1
F2
F3
F4
F5
F6
F7
G0
G1
G2
G3
G4
G5
G6
G7
H0
H1
H2
H3
H4
H5
H6
H7
I0
I1
I2
I3
I4
I5
I6
I7
J0
J1
J2
J3
J4
J5
J6
J7
SCL
SDA
RST
INT
VCC
GND
VCC
SCL
SDA
19
21
23
22
18
17
20
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
ADP5587
RST
INT
Figure 9. Typical Operating Circuit
The ADP5587 is a GPIO expander that can be configured either
as an 18 I/O port expander or as a 10 column × 8 row keypad
matrix (80 keys maximum). It is ideal for cellular phone designs
and other portable devices that require a large extended keypad
and/or expanded I/Os. When smaller size keypads are required,
unused GPIOs in the keypad matrix can be used as I/Os (GPOs
and GPIs). All GPIOs (rows and columns) default to GPIs at
power-up with pull-ups and debounce enabled.
KEYPAD OPERATION
Any number of rows and columns, up to 10 columns × 8 rows,
can be configured to be part of the keypad matrix. The rows and
columns that make up the keypad matrix must be configured by
setting the corresponding bits in Register 0x1D to Register 0x1F.
Key presses and releases appear in the key event table/registers
with a decimal value of 1 (0x01 hexadecimal or 0000001 binary)
through a decimal value of 80 (0x50 hexadecimal or 1010000
binary). See Table 9 for key event number assignments. The
keypad, in idle mode, is configured with columns driven low
and rows as inputs configured high with pull-up resistors.
Table 9. Key Event Number Assignment Table
Row
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
R0
1
2
3
4
5
6
7
8
9
10
R1
11
12
13
14
15
16
17
18
19
20
R2
21
22
23
24
25
26
27
28
29
30
R3
31
32
33
34
35
36
37
38
39
40
R4
41
42
43
44
45
46
47
48
49
50
R5
51
52
53
54
55
56
57
58
59
60
R6
61
62
63
64
65
66
67
68
69
70
R7
71
72
73
74
75
76
77
78
79
80
When one key press or multiple key presses (short between
column and row) occur, the internal state machine checks the
row pins to determine which one is driven low and then triggers
an internal interrupt. The state machine then starts a key scan
cycle to determine which columns are involved in the key press.
After a key has been pressed for 25 ms, the state machine sets
the appropriate key number in the key event status register with
the key-pressed bits set (the MSB in the key event register) in
the order detected. The state machine then sets the KE_INT bit
in Register 0x02. If the KE_IEN field in Register 0x01 is set, an
interrupt is sent to the host processor.


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