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MC13850EP Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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MC13850EP Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 54 page Introduction MC13850 Advance Information, Rev. 1 2 Freescale Semiconductor • Noise Figure (NF): 1.6 dB at 860 MHz, 1.4 dB at 1960 MHz, and 1.55 dB at 2400 MHz in low IP3 mode • Output 1 dB compression point (P1dB): 9 dBm at 470 MHz and 11.5 dBm at 1060 MHz in high IP3 mode • Selectable IP3 mode allows for running at the desired IP3 performance for a receiver's linearity requirements • Bypass mode has return losses comparable to active mode, for use in systems with filters and duplexers • Bypass mode improves dynamic range in variable signal strength environments • Integrated logic-controlled standby mode with current drain < 1µA • Total supply current: 5 mA at 2.7 V in low IP3 mode and 10 mA in high IP3 mode. Bypass mode <10 µA • In a receiver system with 20% active mode and 80% bypass mode, the average current drain is 1mA • On-chip bias sets the bias point • Bias stabilized for device and temperature variations • MLPD-8 leadless package with low parasitics • 470-860, 900, 1960, and 2400 MHz application circuit evaluation boards with characterization data are available • Available in tape and reel packaging Figure 1 shows a simplified block diagram of the MC13850 with the pinouts and location of the Pin 1 designator on the package. Figure 1. Simplified Block Diagram Gain Enable Vc c 2 5 7 6 Enable2 Logic RF IN 3 1 8 4 . Gnd NC Enable1 Gnd RF OUT Pin 1 Designator on Package |
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