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MC9S08QD4CPC Datasheet(PDF) 66 Page - Freescale Semiconductor, Inc |
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MC9S08QD4CPC Datasheet(HTML) 66 Page - Freescale Semiconductor, Inc |
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66 / 198 page  Chapter 5 Resets, Interrupts, and General System Control MC9S08QD4 Series MCU Data Sheet, Rev. 6 66 Freescale Semiconductor Table 5-13. SPMSC2 Register Field Descriptions Field Description 7 LVWF Low-Voltage Warning Flag — The LVWF bit indicates the low voltage warning status. 0 Low voltage warning not preset. 1 Low voltage warning is present or was present. 6 LVWACK Low-Voltage Warning Acknowledge — The LVWACK bit is the low-voltage warning acknowledge. Writing a 1 to LVWACK clears LVWF to a 0 if a low voltage warning is not present. 5 LVDV Low-Voltage Detect Voltage Select — The LVDV bit selects the LVD trip point voltage (VLVD). 0 Low trip point selected (VLVD = VLVDL). 1 High trip point selected (VLVD = VLVDH). 4 LVWV Low-Voltage Warning Voltage Select — The LVWV bit selects the LVW trip point voltage (VLVW). 0 Low trip point selected (VLVW = VLVWL). 1 High trip point selected (VLVW = VLVWH). 3 PPDF Partial Power Down Flag — The PPDF bit indicates that the MCU has exited the stop2 mode. 0 Not stop2 mode recovery. 1 Stop2 mode recovery. 2 PPDACK Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit. 0 PPDC Partial Power Down Control — The write-once PPDC bit controls whether stop2 or stop3 mode is selected. 0 Stop3 mode enabled. 1 Stop2, partial power down, mode enabled. |
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