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MC9S08QD4CPC Datasheet(PDF) 63 Page - Freescale Semiconductor, Inc

Part # MC9S08QD4CPC
Description  HCS08 Microcontrollers
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC9S08QD4CPC Datasheet(HTML) 63 Page - Freescale Semiconductor, Inc

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Chapter 5 Resets, Interrupts, and General System Control
MC9S08QD4 Series MCU Data Sheet, Rev. 6
Freescale Semiconductor
63
5.8.7
System Real-Time Interrupt Status and Control Register (SRTISC)
This high-page register contains status and control bits for the RTI.
76
54
321
0
R
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
W
Reset:
000
01
001
= Unimplemented or Reserved
Figure 5-8. System Device Identification Register — Low (SDIDL)
Table 5-9. SDIDL Register Field Descriptions
Field
Description
7:0
ID[7:0]
Part Identification Number — Each derivative in the HCS08 family has a unique identification number. The
MC9S08QD4 series is hard coded to the value 0x011. See also ID bits in Table 5-8.
76
54
321
0
RRTIF
0
RTICLKS
RTIE
0
RTIS
W
RTIACK
Reset:
000
00
000
= Unimplemented or Reserved
Figure 5-9. System RTI Status and Control Register (SRTISC)
Table 5-10. SRTISC Register Field Descriptions
Field
Description
7
RTIF
Real-Time Interrupt Flag — This read-only status bit indicates the periodic wakeup timer has timed out.
0 Periodic wakeup timer not timed out.
1 Periodic wakeup timer timed out.
6
RTIACK
Real-Time Interrupt Acknowledge — This write-only bit is used to acknowledge real-time interrupt request
(write 1 to clear RTIF). Writing 0 has no meaning or effect. Reads always return 0.
5
RTICLKS
Real-Time Interrupt Clock Select — This read/write bit selects the clock source for the real-time interrupt.
0 Real-time interrupt request clock source is internal 1 kHz oscillator.
1 Real-time interrupt request clock source is 32 kHz ICS clock.
4
RTIE
Real-Time Interrupt Enable — This read-write bit enables real-time interrupts.
0 Real-time interrupts disabled.
1 Real-time interrupts enabled.
2:0
RTIS
Real-Time Interrupt Delay Selects — These read/write bits select the period for the RTI. See Table 5-11


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