Electronic Components Datasheet Search |
|
ST72325XX Datasheet(PDF) 29 Page - STMicroelectronics |
|
ST72325XX Datasheet(HTML) 29 Page - STMicroelectronics |
29 / 197 page ST72325xx 29/197 6.3 RESET SEQUENCE MANAGER (RSM) 6.3.1 Introduction The reset sequence manager includes three RE- SET sources as shown in Figure 15: ■ External RESET source pulse ■ Internal LVD RESET (Low Voltage Detection) ■ Internal WATCHDOG RESET These sources act on the RESET pin and it is al- ways kept low during the delay phase. The RESET service routine vector is fixed at ad- dresses FFFEh-FFFFh in the ST7 memory map. The basic RESET sequence consists of 3 phases as shown in Figure 14: ■ Active Phase depending on the RESET source ■ 256 or 4096 CPU clock cycle delay (selected by option byte) ■ RESET vector fetch The 256 or 4096 CPU clock cycle delay allows the oscillator to stabilise and ensures that recovery has taken place from the Reset state. The shorter or longer clock cycle delay should be selected by option byte to correspond to the stabilization time of the external oscillator used in the application (see section 14.1 on page 181). The RESET vector fetch phase duration is 2 clock cycles. Figure 14. RESET Sequence Phases Caution: When the ST7 is unprogrammed or fully erased, the Flash is blank and the RESET vector is not programmed. For this reason, it is recommended to keep the RESET pin in low state until programming mode is entered, in order to avoid unwanted behavior. 6.3.2 Asynchronous External RESET pin The RESET pin is both an input and an open-drain output with integrated RON weak pull-up resistor. This pull-up has no fixed value but varies in ac- cordance with the input voltage. It can be pulled low by external circuitry to reset the device. See “CONTROL PIN CHARACTERISTICS” on page 162 for more details. A RESET signal originating from an external source must have a duration of at least th(RSTL)in in order to be recognized (see Figure 16). This de- tection is asynchronous and therefore the MCU can enter reset state even in HALT mode. Figure 15. Reset Block Diagram RESET Active Phase INTERNAL RESET 256 or 4096 CLOCK CYCLES FETCH VECTOR RESET RON VDD WATCHDOG RESET LVD RESET INTERNAL RESET PULSE GENERATOR Filter |
Similar Part No. - ST72325XX |
|
Similar Description - ST72325XX |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |