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MB90598G Datasheet(PDF) 14 Page - Fujitsu Component Limited. |
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MB90598G Datasheet(HTML) 14 Page - Fujitsu Component Limited. |
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14 / 56 page  MB90595G Series 14 DS07-13705-7E (12) Initialization The device contains internal registers which are initialized only by a power-on reset. To initialize these registers, please turn on the power again. (13) Directions of “DIV A, Ri” and “DIVW A, RWi” instructions In the signed multiplication and division instructions (“DIV A, Ri” and “DIVW A, RWi”), the value of the corre- sponding bank register (DTB, ADB, USB, SSB) is set in “00H”. If the values of the corresponding bank register (DTB,ADB,USB,SSB) are set to other than “00H”, the remainder by the execution result of the instruction is not stored in the register of the instruction operand. (14) Using REALOS The use of EI2OS is not possible with the REALOS real time operating system. (15) Caution on Operations during PLL Clock Mode If the PLL clock mode is selected in the microcontroller, it may attempt to continue the operation using the free- running frequency of the automatic oscillating circuit in the PLL circuitry even if the oscillator is out of place or the clock input is stopped. Performance of this operation, however, cannot be guaranteed. Oscillation setting time∗2 Power-on reset∗1 Vcc (Power-supply pin) PONR (power-on reset) signal RST (external asynchronous reset) signal RST (internal reset) signal Oscillation clock signal KA (internal operation clock A) signal KB (internal operation clock B) signal PORT (port output) signal High-impedance *1:Power-on reset time: Period of “clock frequency × 217” (Clock frequency of 16 MHz: 8.19 ms) *2:Oscillation setting time: Period of “clock frequency × 218” (Clock frequency of 16 MHz: 16.38ms) RST pin is “L” |
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