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CY8C29x66 Datasheet(PDF) 9 Page - Cypress Semiconductor |
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CY8C29x66 Datasheet(HTML) 9 Page - Cypress Semiconductor |
9 / 37 page CY8C23433, CY8C23533 Document Number: 001-44369 Rev. *B Page 9 of 37 28-Pin Part Pinout Table 4. Pin Definitions - 28-Pin (SSOP) Description Figure 6. CY8C23433 28-Pin PSoC Device 1 IO I P0[7] Analog Column Mux IP and ADC IP 2 IO IO P0[5] Analog Column Mux IP and Column O/P and ADC IP 3 IO IO P0[3] Analog Column Mux IP and Column O/P and ADC IP 4 IO I P0[1] Analog Column Mux IP and ADC IP 5 IO P2[7] GPIO 6 IO P2[5] GPIO 7 IO I P2[3] Direct Switched Capacitor Input 8 IO I P2[1] Direct Switched Capacitor Input 9IO AVref P3[0][5] GPIO/ADC Vref (optional) 10 IO P1[7] I2C SCL 11 IO P1[5] I2C SDA 12 IO P1[3] GPIO 13 IO P1[1][6] GPIO, Xtal Input, I2C SCL, ISSP SCL 14 Power Vss Ground Pin 15 IO P1[0][6] GPIO, Xtal Output, I2C SDA, ISSP SDA 16 IO P1[2] GPIO 17 IO P1[4] GPIO, External Clock IP 18 IO P1[6] GPIO 19 IO P3[1][7] GPIO 20 IO I P2[0] Direct Switched Capacitor Input 21 IO I P2[2] Direct Switched Capacitor Input 22 IO P2[4] External Analog Ground (AGnd) 23 IO P2[6] Analog Voltage Reference (VRef) 24 IO I P0[0] Analog Column Mux IP and ADC IP 25 IO I P0[2] Analog Column Mux IP and ADC IP 26 IO I P0[4] Analog Column Mux IP and ADC IP 27 IO I P0[6] Analog Column Mux IP and ADC IP 28 Power Vdd Supply Voltage LEGEND : A = Analog, I = Input, and O = Output. AIO, P0[7] IO, P0[5] IO, P0[3] AIO, P0[1] IO, P2[7] IO, P2[5] AIO, P2[3] AIO, P2[1] AVref, IO, P3[0] I2C SCL, IO, P1[7] I2C SDA, IO, P1[5] IO, P1[3] I2C SCL,ISSP SCL,XTALin,IO, P1[1] Vss Vdd P0[6], AIO, AnColMux and ADC IP P0[4], AIO, AnColMux and ADC IP P0[2], AIO, AnColMux and ADC IP P0[0], AIO, AnColMux and ADC IP P2[6], VREF P2[4], AGND P2[2], AIO P2[0], AIO P3[1], IO P1[6], IO P1[4], IO, EXTCLK P1[2], IO P1[0],IO,XTALout,ISSP SDA,I2C SDA SSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Notes 5. Even though P3[0] is an odd port, it resides on the left side of the pinout. 6. ISSP pin, which is not High Z at POR. 7. Even though P3[1] is an even port, it resides on the right side of the pinout. [+] Feedback |
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