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74LV4020N Datasheet(PDF) 6 Page - NXP Semiconductors |
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74LV4020N Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 20 page 74LV4020_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 29 November 2005 6 of 20 Philips Semiconductors 74LV4020 14-stage binary ripple counter 9. Limiting values [1] Above Tamb = 70 °C: Ptot derates linearly with 12 mW/K. [2] Above Tamb = 70 °C: Ptot derates linearly with 8 mW/K. [3] Above Tamb = 60 °C: Ptot derates linearly with 5.5 mW/K. 10. Recommended operating conditions [1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to VCC = 1.0 V (with input levels GND or VCC). Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7 V IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V - ±20 mA IOK output clamping current VO < −0.5 V or VO >VCC + 0.5 V - ±50 mA IO output current VO = −0.5 V to VCC + 0.5 V - ±25 mA ICC quiescent supply current - 50 mA IGND ground current - −50 mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C DIP16 package [1] - 750 mW SO16 package [2] - 500 mW SSOP16 and TSSOP16 packages [3] - 400 mW Table 6: Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage [1] 1.0 3.3 5.5 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature −40 - +125 °C ∆t/∆V input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 3.6 V - - 100 ns/V VCC = 3.6 V to 5.5 V - - 50 ns/V |
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