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PCA2000U1 Datasheet(PDF) 11 Page - NXP Semiconductors |
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PCA2000U1 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 30 page PCA2000_2001 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 08 — 23 August 2010 11 of 30 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse 7.6 Programming procedure For a watch it is essential that the timing calibration can be made after the watch is fully assembled. In this situation, the supply pads are often the only terminals which are still accessible. Writing to the OTP cells and performing the related functional checks is achieved in the PCA2000 and PCA2001 by modulating the supply voltage. The necessary control circuit consists basically of a voltage level detector, an instruction counter which determines the function to be performed, and an 8-bit shift register which allows writing to the OTP cells of an 8-bit word in one step and acts as a data pointer for checking the OTP content. There are six different instruction states (state 3 and state 5 are handled as state 4): • State 1: measurement of the quartz crystal oscillator frequency (divided by 1024) • State 2: measurement of the inhibition time • State 3: write/check word A • State 4: write/check word B • State 5: write/check word C • State 6: check word D (type recognition) Each instruction state is switched on with a pulse to VP(prog)(start). After this large pulse, an initial waiting time of t0 is required. The programming instructions are then entered by modulating the supply voltage with small pulses (amplitude VP(mod) and pulse width tmod). The first small pulse defines the start time, the following pulses perform three different functions, depending on the time delay (td) from the preceding pulse (see Figure 7, Figure 8, Figure 11 and Figure 12): • td =t1 (0.7 ms); increments the instruction counter • td =t2 (1.7 ms); clocks the shift register with data = logic 0 • td =t3 (2.7 ms); clocks the shift register with data = logic 1 The programming procedure requires a stable oscillator. This means that a waiting time, determined by the start-up time of the oscillator is necessary after power-up of the circuit. After the VP(prog)(start) pulse, the instruction counter is in state 1 and the data shift register is cleared. The instruction state ends with a second pulse to VP(prog)(stop) or with a pulse to Vstore. In any case, the instruction states are terminated automatically 2 seconds after the last supply modulation pulse. 7.7 Programming the memory cells Applying the two-stage programming pulse (see Figure 7) transfers the stored data in the shift register to the OTP cells. Perform the following to program a memory word: 1. Starting with a VP(prog)(start) pulse wait for the time period t0 then set the instruction counter to the word to be written (td = t1). |
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