ISP1504C1 datasheet(7/81 Pages) NXP

Part #	ISP1504C1

Description	ULPI Hi-Speed Universal Serial Bus On-The-Go transceiver

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Manufacturer	NXP [NXP Semiconductors]

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ISP1504A1_ISP1504C1_1

Product data sheet

Rev. 01 — 6 August 2007

6 of 80

NXP Semiconductors

ISP1504A1; ISP1504C1

ULPI HS USB OTG transceiver

[1]

Symbol names ending with underscore N, for example, NAME_N, indicate active LOW signals.

[2]

For details on external components required on each pin, see bill of materials and application diagrams in Section 15.

[3]

I = input; O = output; I/O = digital input/output; OD = open-drain output; AI/O = analog input/output; P = power or ground pin.

[4]

A detailed description of these pins can be found in Section 7.9.

CS_N/

PWRDN

C3

I

active LOW chip select

• When this pin is HIGH, ULPI pins will be 3-stated and the chip is in power-down

mode.

• When this pin is LOW, ULPI pins will operate normally.

plain input

RESET_N

C4

I

active LOW, asynchronous reset input

If this pin is not used, it must directly be connected to VCC(I/O).

plain input

DATA7

C6

I/O

pin 7 of the bidirectional ULPI data bus

slew rate controlled output (1 ns); plain input; programmable pull down

DP

D1

AI/O

data plus (D+) pin of the USB cable

ID

D3

I

identiﬁcation (ID) pin of the micro-USB cable; see Section 7.6.1

If this pin is not used, it is recommended to connect it to REG3V3.

plain input; TTL level

PSW_N

D4

OD

active LOW external VBUS power switch or external charge pump enable

open-drain output; 5 V tolerant

NXT

D5

O

ULPI next signal

slew rate controlled output (1 ns)

STP

D6

I

ULPI stop signal

plain input; programmable pull up

FAULT

E2

I

input pin for the external VBUS digital overcurrent or the fault detector signal

If this pin is not used, it must be connected to ground.

plain input; 5 V tolerant

REG3V3

E3

P

3.3 V regulator output requiring parallel 0.1

µF and 4.7 µF capacitors; internally

powers OTG, analog core and ATX; cannot be externally used as a power source

DIR

E5

O

ULPI direction signal

slew rate controlled output (1 ns)

REG1V8

E6

P

1.8 V regulator output requiring parallel 0.1

µF and 4.7 µF capacitors; internally

powers digital core and analog core; cannot be externally used as a power source

n.c.

F1, F2

-

not connected

VCC

F3

P

input supply voltage or battery source; 3.0 V to 4.5 V

VBUS

F4

AI/O

must be connected to the VBUS pin of the USB cable; required in all conﬁgurations,

except when the ISP1504x1 is used as a host-only with an external 5 V source

XTAL1

F5

AI/O

crystal oscillator or clock input; 1.8 V peak input allowed; frequency is 19.2 MHz for

ISP1504A1, and 26 MHz for ISP1504C1

XTAL2

F6

AI/O

crystal oscillator output; if crystal is not in use, leave this pin open

Table 2.

Pin description …continued

Symbol[1][2]

Type[3] Description[4]

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