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LMH6645MFX Datasheet(PDF) 14 Page - National Semiconductor (TI) |
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LMH6645MFX Datasheet(HTML) 14 Page - National Semiconductor (TI) |
14 / 19 page Application Notes Circuit Description: The LMH6645/6646/6647 family is based on National Semi- conductor’s proprietary VIP10 dielectrically isolated bipolar process. This device family architecture features the following: • Complimentary bipolar devices with exceptionally high f t ( ∼8GHz) even under low supply voltage (2.7V) and low Collector bias current. • Rail-to-Rail input which allows the input common mode voltage to go beyond either rail by about 0.5V typically. • A class A-B “turn-around” stage with improved noise, offset, and reduced power dissipation compared to simi- lar speed devices (patent pending). • Common Emitter push-pull output stage capable of 20mA output current (at 0.5V from the supply rails) while con- suming only ∼700µA of total supply current per channel. This architecture allows output to reach within milli-volts of either supply rail at light loads. • Consistent performance from any supply voltage (2.7V-10V) with little variation with supply voltage for the most important specifications (e.g. BW, SR, I OUT, etc.) Application Hints: The total input common mode voltage range, which extends from below V − to beyond V+, is covered by both a PNP and a NPN stage. The NPN stage is switched on whenever the input is less than 1.2V from V + and the PNP stage covers the rest of the range. In terms of the input voltage, there is an overlapping region where both stages are processing the input signal. This region is about 0.5V from beginning to the end. As far as the device application is concerned, this transition is a transparent operation. However, keep in mind that the input bias current value and direction will depend on which input stage is operating (see typical performance characteristics for plots). For low distortion applications, it is best to keep the input common mode voltage from transvers- ing this transition point. Low gain settling applications, which generally encounter larger peak-to-peak input voltages, could be configured as inverting stages to eliminate common mode voltage fluctuations. In terms of the output, when the output swing approaches either supply rail, the output transistor will enter a Quasi-saturated state. A subtle effect of this operational region is that there is an increase in supply current in this state (up to 1mA). The onset of Quasi-saturation region is a function of output loading (current) and varies from 100mV at no load to about 1V when output is delivering 20mA, as measured from supplies. Both input common mode voltage and output voltage level effect the supply current (see typical performance characteristics for plot). With 2.7V supplies and a common mode input voltage range that extends beyond either supply rail, the LMH6645/6646/6647 family is well suited to many low voltage/low power applications. Even with 2.7V supplies, the −3dB BW (@ A V = +1) is typically 55MHz with a tested limit of 45MHz. Production testing guarantees that process varia- tions will not compromise speed. This device family is designed to avoid output phase rever- sal. With input over-drive, the output is kept near the supply rail (or as close to it as mandated by the closed loop gain setting and the input voltage). Figure 1, below, shows the input and output voltage when the input voltage significantly exceeds the supply voltages: As can be seen, the output does not exhibit any phase reversal as some op amps do. However, if the input voltage range is exceeded by more than a diode drop beyond either rail, the internal ESD protection diodes will start to conduct. The current flow in these ESD diodes should be externally limited. LMH6647 Micro-power Shutdown The LMH6647 can be shutdown to save power and reduce its supply current to less than 50µA guaranteed, by applying a voltage to the SD pin. The SD pin is “active high” and needs to be tied to V− for normal operation. This input is low current (<20µA, 4pF equivalent capacitance) and a resistor to V − ( ≤20kΩ) will result in normal operation. Shutdown is guaranteed when SD pin is 0.4V or less from V + at any operating supply voltage and temperature. In the shutdown mode, essentially all internal device biasing is turned off in order to minimize supply current flow and the output goes into Hi-Z (high impedance) mode. Complete device Turn-on and Turn-off times vary considerably relative to the output loading conditions, output voltage, and input impedance, but is generally limited to less than 1µs (see tables for actual data). 20020233 FIGURE 1. Input/Output Shown with Exceeded Input CMVR www.national.com 14 |
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