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ISL9001IRNZ-T Datasheet(PDF) 8 Page - Intersil Corporation

Part # ISL9001IRNZ-T
Description  LDO with Low ISUPPLY, High PSRR
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL9001IRNZ-T Datasheet(HTML) 8 Page - Intersil Corporation

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8
FN9231.2
March 28, 2008
Pin Description
Typical Application
PIN
NUMBER
PIN NAME
DESCRIPTION
1
VIN
Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
2
EN
LDO Enable.
3
CBYP
Reference Bypass Capacitor Pin:
Optionally connect capacitor of value 0.01µF to 0.1µF between this pin and GND to achieve lowest noise and
highest PSRR.
4
CPOR
POR Delay Setting Capacitor Pin:
Connect a capacitor between this pin and GND to delay the POR output release after the output reaches 94% of
its specified voltage level. (200ms delay per 0.01µF).
5
GND
GND is the connection to system ground. Connect to PCB Ground plane.
6
NC
Do not connect.
7POR
Open-drain POR Output (active-low):
Internally connected to VO through 100k
Ω resistor.
8
VO
LDO Output:
Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
C1, C3: 1µF X5R CERAMIC CAPACITOR
ISL9001
VIN
EN
CBYP
VO
GND
8
5
1
2
3
VIN (2.3V TO 5V)
ENABLE
VOUT
C1
C2
C3
OFF
ON
CPOR
C4
RESET
(200ms DELAY,
C4 = 0.01µF)
VOUT TOO LOW
VOUT OK
C4: 0.01µF X7R CERAMIC CAPACITOR
C2: 0.1µF X7R CERAMIC CAPACITOR
POR
7
4
ISL9001


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