7

FN6105.1

September 15, 2008

Supply Sequencing and Overvoltage Protection

With any CMOS device, proper power supply sequencing is

required to protect the device from excessive input currents

which might permanently damage the IC. All I/O pins contain

ESD protection diodes from the pin to V+ and to GND (see

Figure 9). To prevent forward biasing these diodes, V+ must

be applied before any input signals, and the input signal

voltages must remain between V+ and GND.

If these conditions cannot be guaranteed, then precautions

must be implemented to prohibit the current and voltage at

the logic pin and signal pins from exceeding the maximum

ratings of the switch. The following two methods can be used

to provided additional protection to limit the current in the

event that the voltage at a signal pin or logic pin goes below

ground or above the V+ rail.

Logic inputs can be protected by adding a 1k

Ω resistor in

series with the logic input (see Figure 9). The resistor limits

the input current below the threshold that produces

permanent damage, and the sub-microamp input current

produces an insignificant voltage drop during normal

operation.

This method is not acceptable for the signal path inputs.

Adding a series resistor to the switch input defeats the

diodes to the signal pins as shown in Figure 9 will shunt the

fault current to the supply or to ground thereby protecting the

switch. These Schottky diodes must be sized to handle the

expected fault current.

Power-Supply Considerations

The ISL84762 construction is typical of most single supply

CMOS analog switches, in that they have two supply pins:

V+ and GND. V+ and GND drive the internal CMOS

switches and set their analog voltage limits. Unlike switches

with a 4V maximum supply voltage, the ISL84762 4.8V

maximum supply voltage provides plenty of room for the

10% tolerance of 3.6V supplies, as well as room for

overshoot and noise spikes.

The minimum recommended supply voltage is 1.65V but the

part will operate with a supply below 1.5V. It is important to

note that the input signal range, switching times, and

ON-resistance degrade at lower supply voltages. Refer to

the “Electrical Specifications” tables beginning on page 3

and “Typical Performance Curves” beginning on page 8 for

details.

V+ and GND also power the internal logic and level shiftiers.

The level shiftiers convert the input logic levels to switched

V+ and GND signals to drive the analog switch gate

terminals.

This family of switches cannot be operated with bipolar

supplies, because the input switching point becomes

negative in this configuration.

FIGURE 8. V+ SERIES RESISTOR FOR ENHANCED ESD AND

LATCH-UP IMMUNITY

IN

COM

100

Ω

NO

NC

V+

GND

C

OPTIONAL

PROTECTION

RESISTOR

FIGURE 9. OVERVOLTAGE PROTECTION

GND

V+

OPTIONAL

PROTECTION

RESISTOR

OPTIONAL

SCHOTTKY

DIODE

OPTIONAL

SCHOTTKY

DIODE

ISL84762