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ISL6269 Datasheet(PDF) 5 Page - Intersil Corporation |
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ISL6269 Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 14 page 5 FN9177.0 June 14, 2005 Functional Pin Descriptions GND Pin Bottom terminal pad of QFN package Signal common of the IC. Unless otherwise stated, signals are referenced to the GND pin, not the PGND pin. VIN Pin-1 (Input) The VIN pin measures the converter input voltage with respect to the GND pin. VIN is a required input to the R3 PWM modulator. The VIN pin is also the input source for the integrated +5V LDO regulator. VCC Pin-2 (Output) The VCC pin is the output of the integrated +5V LDO regulator, which provides the bias voltage for the IC. The VCC pin delivers regulated +5V whenever the EN pin is pulled above VENTHR. For best performance the LDO requires at least a 1µF MLCC decouple capacitor to the GND pin. FCCM Pin-3 (Logic) The FCCM pin configures the controller to operate in forced- continuous-conduction-mode (FCCM) or diode-emulation- mode (DEM.) DEM is disabled when the FCCM pin is pulled above the rising threshold voltage VFCCMTHR, and DEM is enabled when the FCCM pin is pulled below the falling threshold voltage VFCCMTHF. EN Pin-4 (Logic) The EN pin is the on/off switch of the IC. When the EN pin is pulled above the rising threshold voltage VENTHR, VCC will ramp up and begin regulation. The soft-start sequence begins once VCC ramps above the power-on reset (POR) rising threshold voltage VCCTHR. When the EN pin is pulled below the falling threshold voltage VENTHF, PWM immediately stops and VCC decays below the POR falling threshold voltage VCCTHF, at which time the IC turns off. COMP Pin-5 (Signal) The COMP pin is the output of the control-loop error amplifier. Loop compensation components connect from the COMP pin to the FB pin. FB Pin-6 (Signal) The FB pin is the inverting input of the control loop error amplifier. The converter will regulate to 600mV at the FB pin with respect to the GND pin. Scale the desired output voltage to 600mV with a voltage divider network made from resistors RTOP and RBOTTOM. Loop compensation components connect from the FB pin to the COMP pin. FSET Pin-7 (Signal) The FSET pin programs the PWM switching frequency of the converter. Connect a resistor RFSET and a 10nF capacitor CFSET from the FSET pin to the GND pin. VO Pin-8 (Input) The VO pin makes a direct measurement of the converter output voltage used exclusively by the R3 PWM modulator. The VO pin should be connected to the top of feedback resistor RTOP at the converter output. Refer to Figure 1, Typical Application Schematic. ISEN Pin-9 (Input) The ISEN pin is the input to the overcurrent protection (OCP) and short-circuit protection (SCP) circuits. Connect a resistor RSEN between the ISEN pin and the PHASE pin. Select the value of RSEN that will force the ISEN pin to source the ISEN threshold current IOC when the peak inductor current reaches the desired OCP setpoint. The SCP threshold current ISC is fixed at twice the OCP threshold current IOC PGND Pin-10 The PGND pin should be connected to the source of the low- side MOSFET, preferably with an isolated path that is in parallel with the trace connecting the LG pin to the gate of the MOSFET. The PGND pin is an isolated path used exclusively to conduct the turn-off transient current that flows out the PGND pin, through the gate-source capacitance of the low-side MOSFET, into the LG pin, and back to the PGND pin through the pull-down resistance of the LG driver. The adaptive shoot-through protection circuit, measures the low-side MOSFET gate voltage with respect to the PGND pin, not the GND pin. LG Pin-11 (Output) The LG pin is the output of the low-side MOSFET gate driver. Connect to the gate of the low-side MOSFET. PVCC Pin-12 (Input) The PVCC pin is the input voltage for the low-side MOSFET gate driver LG. Connect a +5V power source to the PVCC pin with respect to the GND pin, a 1µF MLCC bypass capacitor needs to be connected from the PVCC pin to the PGND pin, not the GND pin. The VCC output may be used for the PVCC input voltage source. Connect the VCC pin to the PVCC pin through a low-pass filter consisting of a resistor and the PVCC bypass capacitor. Refer to Figure 1, Typical Application Schematic. ISL6269 |
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