8

FN9257.0

February 13, 2006

Determine the overcurrent trip point greater than the

maximum output continuous current at maximum inductor

ripple current.

High Speed MOSFET Gate Driver

The integrated driver has the same drive capability and

feature as the Intersil’s 12V gate driver, ISL6612. The PWM

tri-state feature helps prevent a negative transient on the

output voltage when the output is being shut down. This

eliminates the Schottky diode that is used in some systems

for protecting the microprocessor from reversed-output-

voltage damage. See the ISL6612 datasheet for

specification parameters that are not defined in the current

ISL8104 electrical specifications table

.

Reference Input

The REFIN pin allows the user to bypass the internal 0.597V

reference with an external reference. If REFIN is NOT above

~2.2V, the external reference pin is used as the control

reference instead of the internal 0.597V reference. When not

using the external reference option the REFIN pin should be

left floating. An internal 6mA pull-up keeps this REFIN pin

above 2.2V in this situation.

Internal Reference and System Accuracy

The Internal Reference is set to 0.597V. The total DC system

accuracy of the system is to be within 1.0% over commercial

temperature range and 1.5% over the industrial temperature

range. System Accuracy includes Error Amplifier offset, and

Reference Error. The use of REFIN may add up to 3mV of

offset error into the system (as the Error Amplifier offset is

trimmed out via the internal System reference.)

Application Guidelines

Layout Considerations

As in any high frequency switching converter, layout is very

important. Switching current from one power device to

another can generate voltage transients across the

impedances of the interconnecting bond wires and circuit

traces. These interconnecting impedances should be

minimized by using wide, short printed circuit traces. The

critical components should be located as close together as

possible using ground plane construction or single point

grounding.

A multi-layer printed circuit board is recommended. Figure 5

shows the critical components of the converter. Note that

physical capacitors. Dedicate one solid layer, usually a

middle layer of the PC board, for a ground plane and make

all critical component ground connections with vias to this

layer. Dedicate another solid layer as a power plane and

break this plane into smaller islands of common voltage

levels. Keep the metal runs from the PHASE terminals to the

output inductor short. The power plane should support the

input power and output power nodes. Use copper filled

polygons on the top and bottom circuit layers for the phase

nodes. Use the remaining printed circuit layers for small

signal wiring.

R

OCSET

I

OC_SOURCE

I

∆

2

-----

+





r

•

DS ON

()

I

HSOC

N

U

•

----------------------------------------------------------------------------------

=

N

U

NUMBER OF HIGH SIDE MOSFETs

=

R

OCSET

I

OC_SOURCE

r

•

DS ON

()

200

µA

----------------------------------------------------------------

=

Simple OCP Equation

Detailed OCP Equation

∆I =

V

F

SW

L

OUT

•

---------------------------------

V

OUT

V

IN

----------------

•

F

SW

Regulator Switching Frequency

=

ISLAND ON POWER PLANE LAYER

ISLAND ON CIRCUIT AND/OR POWER PLANE LAYER

VIN

KEY

FIGURE 5. PRINTED CIRCUIT BOARD POWER PLANES

AND ISLANDS

VIA CONNECTION TO GROUND PLANE

+14V

ISL8104

UGATE

PHASE

GND

PVCC

LGATE

VCC

BOOT

SS

PGND

TRACE SIZED FOR 3A PEAK CURRENT

SHORT TRACE, MINIMUM IMPEDANCE

ISL8104