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ISL6532ACR Datasheet(PDF) 7 Page - Intersil Corporation

Part No. ISL6532ACR
Description  ACPI Regulator/Controller for Dual Channel DDR Memory Systems
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6532ACR Datasheet(HTML) 7 Page - Intersil Corporation

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7
FN9099.5
May 5, 2008
STATE LOGIC
S3# Transition Level
VS3
-1.5
-
V
S5# Transition Level
VS5
-1.5
-
V
PWM CONTROLLER GATE DRIVERS
UGATE and LGATE Source
IGATE
--0.8
-
A
UGATE and LGATE Sink
IGATE
-0.8
-
A
NCH BACKFEED CONTROL
NCH Current Sink
INCH
NCH = 0.8V
-
-
6
mA
NCH Trip Level
VNCH
9.0
9.5
10.0
V
VDDQ STANDBY LDO
Output Drive Current
P5VSBY = 5.0V
-
-
650
mA
P5VSBY = 3.3V
-
-
550
mA
VTT REGULATOR
Upper Divider Impedance
RU
-2.5
-
k
Ω
Lower Divider Impedance
RL
-2.5
-
k
Ω
VREF_OUT Buffer Source Current
IVREF_OUT
--
2mA
Maximum VTT Load Current
IVTT_MAX
Periodic load applied with 30% duty cycle
and 10ms period using ISL6532AEVAL1
evaluation board (see Application Note
AN1056)
-3
-
3
A
LINEAR REGULATOR
DC GAIN
Note 3
-
80
-
dB
Gain Bandwidth Product
GBWP
Note 3
9
-
-
MHz
Slew Rate
SR
Note 3
-
6
-
V/
μs
DRIVE2 High Output Voltage
10.0
10.2
-
V
DRIVE2 Low Output Voltage
-
0.16
0.40
V
DRIVE2 High Output Source Current
-.5
-1.4
-
mA
DRIVE2 Low Output Sink Current
.85
1.3
-
mA
PGOOD
PGOOD Rising Threshold
VVTTSNS/VVDDQ S0
-
57.5
-
%
PGOOD Falling Threshold
VVTTSNS/VVDDQ S0
-
45.0
-
%
PROTECTION
OCSET Current Source
IOCSET
15
20
22.5
μA
VDDQ OV Level
VFB/VREF
S0
-
115
-
%
VDDQ UV Level
VFB/VREF
S0
-
85
-
%
Linear Regulator OV Level
VFB2/VREF
S0
-
115
-
%
Linear Regulator UV Level
VFB2/VREF
S0
-
85
-
%
Thermal Shutdown Limit
TSD
Note 3
-
140
-
°C
Electrical Specifications
Recommended Operating Conditions, Industrial Temperature Range, Unless Otherwise Noted. Refer to Block
and Simplified Power System Diagrams and Typical Application Schematics (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISL6532A


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