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ISL9105 Datasheet(PDF) 3 Page - Intersil Corporation

Part No. ISL9105
Description  600mA Low Quiescent Current 1.6MHz High Efficiency Synchronous Buck Regulator
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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ISL9105 Datasheet(HTML) 3 Page - Intersil Corporation

 
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3
FN6415.1
February 13, 2007
Pin Descriptions
VIN
Input supply voltage. Connect a 10
μF ceramic capacitor to
power ground.
EN
Regulator enable pin. Enable the output when driven to high.
Shutdown the chip and discharge output capacitor when
driven to low. Do not leave this pin floating.
POR
216ms timer output. At power-up or EN HI, this output is a
216ms delayed Power-Good signal for the output voltage.
This output can be reset by a low RSI signal. 216ms starts
when RSI goes to high.
MODE
Mode Selection pin. Connect to logic high or input voltage
VIN for low IQ mode; connect to logic low or ground for
forced PWM mode. Do not leave this pin floating.
PHASE
Switching node connection. Connect to one terminal of
inductor.
GND
System ground.
FB
Buck regulator output feedback. Connect to the output
through a voltage divider resistor.
RSI
This input resets the 216ms timer. When the output voltage is
within the PGOOD window, an internal timer is started and
generates a POR signal 216ms later when RSI is low. A high
RSI resets POR and RSI high to low transition restarts the
internal counter if the output voltage is within the window,
otherwise the counter is reset by the output voltage condition.
Exposed Pad
The exposed pad must be connected to the GND pin for
proper electrical performance. The exposed pad must also
be connected to as much as possible for optimal thermal
performance.
Minimum Supply Voltage for Valid POR Signal
1.2
-
-
V
Internal PGOOD Low Rising Threshold
Percentage of nominal regulation voltage
89.5
92
94.5
%
Internal PGOOD Low Falling Threshold
Percentage of nominal regulation voltage
85
88
91
%
Internal PGOOD High Rising Threshold
Percentage of nominal regulation voltage
105.5
108
110.5
%
Internal PGOOD High Falling Threshold
Percentage of nominal regulation voltage
102
105
108
%
Internal PGOOD Delay Time
-64
-
μs
EN, MODE, RSI
Logic Input Low
--
0.4
V
Logic Input High
1.4
-
-
V
Logic Input Leakage Current
Pulled up to 5.5V
-
0.1
1
μA
Thermal Shutdown
-
150
-
°C
Thermal Shutdown Hysteresis
-25
-
°C
Electrical Specifications
Unless otherwise noted, all parameter limits are guaranteed over the recommended operating conditions and the
typical specification are measured at the following conditions: TA = +25°C, VIN = 3.6V, EN = VIN, RSI = MODE = 0V,
L = 3.3
μH, C1 = 10μF, C2 = 10μF, IOUT = 0A (see the Typical Application Circuit). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISL9105


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