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TLC5971RGET Datasheet(PDF) 6 Page - Texas Instruments |
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TLC5971RGET Datasheet(HTML) 6 Page - Texas Instruments |
6 / 37 page TLC5971 SBVS146 – AUGUST 2010 www.ti.com SWITCHING CHARACTERISTICS At TA = –40°C to +85°C, VCC = 6 V to 17 V or VCC = VREG = 3 V to 5.5 V, CVREG = 1 µF, CL = 15 pF, RL = 68 Ω, and VLED = 5 V, unless otherwise noted. Typical values are at TA = +25°C and VCC = 12 V. TLC5971 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tR0 Rise time, SDTO/SCKO 3 10 ns tR1 Rise time, OUTXn BCX = 7Fh 5 15 ns tF0 Fall time, SDTO/SCKO 3 10 ns tF1 Fall time, OUTXn BCX = 7Fh 15 25 ns tD0 SCKI ↑ to SDTO↑↓ 10 25 60 ns tD1 SCKI ↑ to SCKO↑ 5 15 40 ns tD2 (1) SCKO ↑ to SDTO↑↓ 5 10 20 ns SCKI ↑ to OUTRn↑↓, BLANK = 0, BCXn = 7Fh, OUTTMG = 1 tD3 10 25 60 ns Or SCKI ↓ to OUTRn↑↓, BLANK = 0, BCXn = 7Fh, OUTTMG = 0 SCKI ↑ to OUTGn↑↓, BLANK = 0, BCXn = 7Fh, Propagation delay OUTTMG = 1 tD4 25 50 90 ns Or SCKI ↓ to OUTGn↑↓, BLANK = 0, BCXn = 7Fh, OUTTMG = 0 SCKI ↑ to OUTBn↑↓, BLANK = 0, BCXn = 7Fh, OUTTMG = 1 tD5 40 75 120 ns Or SCKI ↓ to OUTBn↑↓, BLANK = 0, BCXn = 7Fh, OUTTMG = 0 16384/fO tD6 (2) Last SCKI ↑ to internal latch pulse genaration 8/fOSC sec SC Shift clock output one pulse tW(SCKO) SCKO ↑ to SCKO↓ 12 25 35 ns width fOSC Internal oscillator frequency 6 10 12 MHz (1) The propagation delays are calculated by tD2 = tD0 – tD1. (2) The generation timing of the internal latch pulse changes depending on the SCKI clock frequency; see the Internal Latch Pulse Generation Timing section. 6 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TLC5971 |
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