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ATF22LV10CZ-25JI Datasheet(PDF) 2 Page - ATMEL Corporation |
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ATF22LV10CZ-25JI Datasheet(HTML) 2 Page - ATMEL Corporation |
2 / 19 page 2 0779M–PLD–7/10 Atmel ATF22LV10C(Q)Z Figure 1-1. Block Diagram 2. Pin Configurations Table 2-1. Pin Configurations (All Pinouts Top View) Pin Name Function CLK Clock IN Logic Inputs I/O Bi-directional Buffers GND Ground VCC (3 to 5.5V) Supply Figure 2-1. TSSOP Note: TSSOP is the smallest package of SPLD offering Figure 2-2. DIP/SOIC Figure 2-3. PLCC Note: For PLCC, pins 1, 8, 15, and 22 can be left unconnected. For superior perfor- mance, connect VCC to pin 1 and GND to pins 8, 15, and 22 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 CLK/IN IN IN IN IN IN IN IN IN IN IN GND VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 CLK/IN IN IN IN IN IN IN IN IN IN IN GND VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN 5 6 7 8 9 10 11 25 24 23 22 21 20 19 IN IN IN GND* IN IN IN I/O I/O I/O GND* I/O I/O I/O |
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