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SX1512BIULTRT Datasheet(PDF) 26 Page - Semtech Corporation

Part No. SX1512BIULTRT
Description  World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine
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Maker  SEMTECH [Semtech Corporation]
Homepage  http://www.semtech.com
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SX1512BIULTRT Datasheet(HTML) 26 Page - Semtech Corporation

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ADVANCED COMMUNICATIONS & SENSING
Rev 3 – 9
th Sept. 2010
26
www.semtech.com
SX1510B/SX1511B/SX1512B
World’s Lowest Voltage Level Shifting GPIO
with LED Driver and Keypad Engine
7
Unused
6:4
Frequency of the LED Driver clock ClkX of all IOs:
0 : OFF. LED driver functionality is disabled for all IOs.
Else : ClkX = fOSC/(2^(RegMisc[6:4]-1))
3
LED Driver mode for Bank A ‘s fading capable IOs (IO1-3)
0: Linear
1: Logarithmic
2
NRESET pin function when externally forced low (Cf. §4.4.1 and §4.9.5)
0: Equivalent to POR
1: Reset PWM/Blink/Fade counters (not user programmed values)
This bit can only be reset manually or by POR, not by NRESET.
1
Auto-increment register address (Cf. §4.5)
0: ON. When several consecutive data are read/written, register address is incremented.
1: OFF. When several consecutive data are read/written, register address is kept fixed.
0x0E
RegMisc
0x00
0
Autoclear NINT on RegData read (Cf. §4.7)
0: ON. RegInterruptSource is also automatically cleared when RegData is read.
1: OFF. RegInterruptSource must be manually cleared, either directly or via
RegEventStatus.
7:4
Unused
0x0F
RegLEDDriverEnable
0xX0
3:0
Enables LED Driver for each [output-configured] IO
0 : LED Driver is disabled
1 : LED Driver is enabled
7:3
Unused
0x10
RegDebounceConfig
0x00
2:0
Debounce time (Cf. §4.6.1)
000: 0.5ms x 1MHz/fOSC
001: 1ms x 1MHz/fOSC
010: 2ms x 1MHz/fOSC
011: 4ms x 1MHz/fOSC
100: 8ms x 1MHz/fOSC
101: 16ms x 1MHz/fOSC
110: 32ms x 1MHz/fOSC
111: 64ms x 1MHz/fOSC
7:4
Unused
0x11
RegDebounceEnable
0xX0
3:0
Enables debouncing for each [input-configured] IO
0 : Debouncing is disabled
1 : Debouncing is enabled
7:5
Unused
0xXX
RegTOnX
0x00
4:0
ON Time of IO[X]:
0 : Infinite (Static mode, TOn directly controlled by RegData, Cf §4.9.2)
1 - 15 : TOnX = 64 * RegTOnX * (255/ClkX)
16 - 31 : TOnX = 512 * RegTOnX * (255/ClkX)
0xXX
RegIOnX
0xFF
7:0
ON Intensity of IO[X]
- Linear mode : IOnX = RegIOnX
- Logarithmic mode (fading capable IOs only) : IOnX = f(RegIOnX) , Cf §4.9.5
7:3
OFF Time of IO[X]:
0 : Infinite (Single shot mode, TOff directly controlled by RegData, Cf §4.9.3)
1 - 15 : TOffX = 64 * RegOffX[7:3] * (255/ClkX)
16 - 31 : TOffX = 512 * RegOffX[7:3] * (255/ClkX)
0xXX
RegOffX
0x00
2:0
OFF Intensity of IO[X]
- Linear mode : IOffX = 4 x RegOff[2:0]
- Logarithmic mode (fading capable IOs only) : IOffX = f(4 x RegOffX[2:0]) , Cf §4.9.5
7:5
Unused
0xXX
RegTRiseX
0x00
4:0
Fade In setting of IO[X]
0 : OFF
1 - 15 : TRiseX = (RegIOnX-(4xRegOffX[2:0])) * RegTRiseX * (255/ClkX)
16 - 31 : TRiseX = 16 * (RegIOnX-(4xRegOffX[2:0])) * RegTRiseX * (255/ClkX)
7:5
Unused
0xXX
RegTFallX
0x00
4:0
Fade Out setting of IO[X]
0 : OFF
1 - 15 : TFallX = (RegIOnX-(4xRegOffX[2:0])) * RegTFallX * (255/ClkX)
16 - 31 : TFallX = 16 * (RegIOnX-(4xRegOffX[2:0])) * RegTFallX * (255/ClkX)
0x7D
RegReset
0x00
7:0
Software reset register
Writing consecutively 0x12 and 0x34 will reset the device (same as POR).
Always reads 0.
Table 9 – SX1510B Configuration Registers Description


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