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SX1512BIULTRT Datasheet(PDF) 15 Page - Semtech Corporation

Part No. SX1512BIULTRT
Description  World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine
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Maker  SEMTECH [Semtech Corporation]
Homepage  http://www.semtech.com
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SX1512BIULTRT Datasheet(HTML) 15 Page - Semtech Corporation

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ADVANCED COMMUNICATIONS & SENSING
Rev 3 – 9
th Sept. 2010
15
www.semtech.com
SX1510B/SX1511B/SX1512B
World’s Lowest Voltage Level Shifting GPIO
with LED Driver and Keypad Engine
4.
During a brown-out event, if VDDM drops above VDROPH a reset will not occur.
5.
During a brown-out event, if VDDM drops between VDROPH and VDROPL a reset may occur.
6.
During a brown-out event, if VDDM drops below VDROPL a reset will occur next time VPOR is crossed.
Please note that a brown-out event is defined as a transient event on VDDM. If VDDM is attached to a battery,
then the gradual decay of the battery voltage will not be interpreted as a brown-out event.
Please also note that a sharp rise in VDDM (> 1V/us) may induce a circuit reset.
4.4.2
Software (RegReset)
Writing consecutively 0x12 and 0x34 to RegReset register will reset all registers to their default values.
4.5
SPI Interface
The SX1510B, SX1511B and SX1512B SPI interface operates only in slave mode. 4 lines are used to exchange
data between an external master host and the slave device:
NSS : Slave select input (active low)
SCK : Clock input
SI : Data input
SO : Data output
The SX1510B, SX1511B and SX1512B have a few user-accessible internal 8-bits registers to set the various
parameters of operation (Cf. §5 for detailed configuration registers description). The SPI interface has been
designed for program flexibility, in that any register can be written or read independently of each other.
4.5.1
WRITE
To write a value into a configuration register the timing diagram below should be carefully followed by the uC.
SCK
NSS
SI
SO
Figure 9 - SPI Write Operation
Successive register data can be written by the master without repeating the address byte, the register address
can be automatically incremented or kept fixed depending on the setting programmed in RegMisc.
4.5.2
READ
To read a value from a configuration register the timing diagram below should be carefully followed by the uC.
SCK
NSS
SI
SO
Figure 10 – SPI Read Operation
Successive register data can be read by the master without repeating the address byte, the register address will
be automatically incremented or kept fixed depending on the setting programmed in RegMisc.


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