 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
R5F357D6KFB Datasheet(PDF) 28 Page - Renesas Technology Corp |
|
||||||||||||||||||||||||||||||
R5F357D6KFB Datasheet(HTML) 28 Page - Renesas Technology Corp |
|
|
28 / 159 page  REJ03B0267-0101 Rev.1.01 Page 28 of 156 Jul 23, 2010 M16C/5M Group, M16C/57 Group 2. Central Processing Unit (CPU) 2.1 Data Registers (R0, R1, R2, and R3) R0, R1, R2, and R3 are 16-bit registers used for transfer, arithmetic, and logic operations. R0 and R1 can be split into upper (R0H/R1H) and lower (R0L/R1L) bits to be used separately as 8-bit data registers. R0 can be combined with R2, and R3 can be combined with R1 and be used as 32-bit data registers R2R0 and R3R1, respectively. 2.2 Address Registers (A0 and A1) A0 and A1 are 16-bit registers used for indirect addressing, relative addressing, transfer, arithmetic, and logic operations. A0 can be combined with A1 and used as a 32-bit address register (A1A0). 2.3 Frame Base Register (FB) FB is a 16-bit register that is used for FB relative addressing. 2.4 Interrupt Table Register (INTB) INTB is a 20-bit register that indicates the start address of a relocatable interrupt vector table. 2.5 Program Counter (PC) The PC is 20 bits wide and indicates the address of the next instruction to be executed. 2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) The USP and ISP stack pointers (SP) are each comprised of 16 bits. The U flag is used to switch between USP and ISP. 2.7 Static Base Register (SB) SB is a 16-bit register used for SB relative addressing. 2.8 Flag Register (FLG) FLG is an 11-bit register that indicates the CPU state. 2.8.1 Carry Flag (C Flag) The C flag retains a carry, borrow, or shift-out bit generated by the arithmetic/logic unit. 2.8.2 Debug Flag (D Flag) The D flag is for debugging only. Set it to 0. 2.8.3 Zero Flag (Z Flag) The Z flag becomes 1 when an arithmetic operation results in 0. Otherwise, it becomes 0. 2.8.4 Sign Flag (S Flag) The S flag becomes 1 when an arithmetic operation results in a negative value. Otherwise, it becomes 0. 2.8.5 Register Bank Select Flag (B Flag) Register bank 0 is selected when the B flag is 0. Register bank 1 is selected when this flag is 1. 2.8.6 Overflow Flag (O Flag) The O flag becomes 1 when an arithmetic operation results in an overflow. Otherwise, it becomes 0. |
Similar Part No. - R5F357D6KFB |
|
Similar Description - R5F357D6KFB |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
