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R5F64188HPFB Datasheet(PDF) 83 Page - Renesas Technology Corp |
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R5F64188HPFB Datasheet(HTML) 83 Page - Renesas Technology Corp |
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83 / 126 page 
REJ03B0255-0110 Rev.1.10 Page 83 of 123 Jun 23, 2010 R32C/118 Group 5. Electrical Characteristics Notes: 1. The device is operationally guaranteed under these operating conditions. 2. VIH and VIL for P8_7 are specified for P8_7 as a programmable port. These values are not applicable to P8_7 as XCIN. 3. Ports P9_0, P9_2, and P11 to P15 are available in the 144-pin package only. Port P9_1 is designated as input pin in the 100-pin package. Table 5.2 Operating Conditions (1/5) (1) Symbol Characteristic Value Unit Min. Typ. Max. VCC Digital supply voltage 3.0 5.0 5.5 V AVCC Analog supply voltage VCC V VREF Reference voltage 3.0 VCC V VSS Digital ground voltage 0V AVSS Analog ground voltage 0V dVCC/dt VCC ramp up rate (VCC < 2.0 V) 0.05 V/ms VIH High level input voltage XIN, RESET, CNVSS, NSD, P2_0 to P2_7, P3_0 to P3_7, P5_0 to P5_3, P8_4 to P8_7 (2), P9_0 to P9_7, P10_0 to P10_7, P11_0 to P11_4, P14_1, P14_3 to P14_6, P15_0 to P15_7 (3) 0.8 × VCC VCC V P4_0 to P4_7, P5_4 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_3 0.8 × VCC 6.0 V P0_0 to P0_7, P1_0 to P1_7, P12_0 to P12_7, P13_0 to P13_7 (3) in single-chip mode 0.8 × VCC VCC V in memory expansion mode or microprocessor mode 0.5 × VCC VCC V VIL Low level input voltage XIN, RESET, CNVSS, NSD, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7 (2), P9_0 to P9_7, P10_0 to P10_7, P11_0 to P11_4, P14_1, P14_3 to P14_6, P15_0 to P15_7 (3) 0 0.2 × VCC V P0_0 to P0_7, P1_0 to P1_7, P12_0 to P12_7, P13_0 to P13_7 (3) in single-chip mode 0 0.2 × VCC V in memory expansion mode or microprocessor mode 0 0.16 × VCC V Topr Operating temperature range Version N -20 85 °C Version D -40 85 °C Version P -40 85 °C |
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