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R5F6416MANFD Datasheet(PDF) 92 Page - Renesas Technology Corp |
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R5F6416MANFD Datasheet(HTML) 92 Page - Renesas Technology Corp |
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92 / 102 page  REJ03B0297-0100 Rev.1.00 Page 92 of 99 Jul 16, 2010 R32C/116A Group 5. Electrical Characteristics VCC =3.3 V Switching Characteristics (VCC = 3.0 to 3.6 V, VSS = 0 V, and Ta =Topr, unless otherwise noted) Note: 1. External circuits are required to satisfy the I2C-bus specification. Table 5.63 Serial Interface Symbol Characteristic Measurement condition Value Unit Min. Max. td(C-Q) TXDi output delay time Refer to Figure 5.6 80 ns th(C-Q) TXDi output hold time 0ns Table 5.64 Intelligent I/O Symbol Characteristic Measurement condition Value Unit Min. Max. td(ISCLK2-TXD) ISTXD2 output delay time Refer to Figure 5.6 180 ns th(ISCLK2-RXD) ISTXD2 output hold time 0ns Table 5.65 Multi-master I2C-bus Interface (Standard-mode) Symbol Characteristic Measurement condition Value Unit Min. Max. tf(SCL) MSCL output fall time Refer to Figure 5.6 2ns tf(SDA) MSDA output fall time 2ns td(SDA-SCL)S MSCL output delay time after start condition/restart condition 20 × tc(φIIC) - 120 52 × tc(φIIC) - 40 ns td(SCL-SDA)P Restart condition/stop condition output delay time after MSCL becomes high 20 × tc(φIIC) + 40 52 × tc(φIIC) + 120 ns td(SCL-SDA) MSDA output delay time 2 ×tc(φIIC) + 40 3 × tc(φIIC) + 120 ns Table 5.66 Multi-master I2C-bus Interface (Fast-mode) Symbol Characteristic Measurement condition Value Unit Min. Max. tf(SCL) MSCL output fall time Refer to Figure 5.6 2 (1) ns tf(SDA) MSDA output fall time 2 (1) ns td(SDA-SCL)S MSCL output delay time after start condition/restart condition 10 × tc(φIIC) - 120 26 × tc(φIIC) - 40 ns td(SCL-SDA)P Restart condition/stop condition output delay time after MSCL becomes high 10 × tc(φIIC) + 40 26 × tc(φIIC) + 120 ns td(SCL-SDA) MSDA output delay time 2 × tc(φIIC) + 40 3 × tc(φIIC) + 120 ns |
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