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RJE0615JSP-00-J3 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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RJE0615JSP-00-J3 Datasheet(HTML) 1 Page - Renesas Technology Corp |
1 / 8 page R07DS0124EJ0200 Rev.2.00 Page 1 of 7 Sep 01, 2010 Preliminary Datasheet RJE0615JSP Silicon P Channel MOS FET Series Power Switching Description This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. Features Built-in the over temperature shut-down circuit. High endurance capability against to the short circuit. Latch type shut down operation (need 0 voltage recovery). Built-in the current limitation circuit. Low on-resistance R DS(on) : 53 m Typ, 65 m Max (VGS = –10 V) High density mounting Outline 1 2 3 4 5 6 7 8 1, 2, 3 Source 4 Gate 5, 6, 7, 8 Drain RENESAS Package code: PRSP0008DD-D (Package name: SOP-8) D S G 4 1 58 D 6 D 7 D Gate Resistor Temperature Sensing Circuit Latch Circuit Gate Shut-down Circuit Current Limitation Circuit S 3 S 2 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage VDSS –60 V VGSS –16 V Gate to source voltage VGSS 2.5 V Drain current ID Note3 –10 A Body-drain diode reverse drain current IDR –10 A Avalanche current IAP Note 2 –4.7 A Avalanche energy EAR Note 2 94.7 mJ Channel dissipation Pch Note 1 2.5 W Channel temperature Tch 150 C Storage temperature Tstg –55 to +150 C Notes: 1 1 Drive operation: When using the glass epoxy board (FR4 40 40 1.6 mm), PW 10 s 2. Tch = 25 C, Rg 50 3. It provides by the current limitation lower bound value. R07DS0124EJ0200 (Previous: REJ03G1943-0100) Rev.2.00 Sep 01, 2010 |
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