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R5F21387ANLG Datasheet(PDF) 51 Page - Renesas Technology Corp |
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R5F21387ANLG Datasheet(HTML) 51 Page - Renesas Technology Corp |
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51 / 60 page  R8C/38A Group 5. Electrical Characteristics REJ03B0274-0120 Rev.1.20 Page 51 of 57 Jul 31, 2010 i = 0 to 2 Figure 5.16 Serial Interface Timing Diagram when VCC = 3 V Notes: 1. When selecting the digital filter by the INTi input filter select bit, use an INTi input HIGH width of either (1/digital filter clock frequency × 3) or the minimum value of standard, whichever is greater. 2. When selecting the digital filter by the INTi input filter select bit, use an INTi input LOW width of either (1/digital filter clock frequency × 3) or the minimum value of standard, whichever is greater. Figure 5.17 Input Timing Diagram for External Interrupt INTi and Key Input Interrupt KIi when VCC = 3 V Table 5.29 Serial Interface Symbol Parameter Standard Unit Min. Max. tc(CK) CLKi input cycle time 300 — ns tW(CKH) CLKi input “H” width 150 — ns tW(CKL) CLKi Input “L” width 150 — ns td(C-Q) TXDi output delay time — 80 ns th(C-Q) TXDi hold time 0— ns tsu(D-C) RXDi input setup time 70 — ns th(C-D) RXDi input hold time 90 — ns Table 5.30 External Interrupt INTi (i = 0 to 4) Input, Key Input Interrupt KIi (i = 0 to 3) Symbol Parameter Standard Unit Min. Max. tW(INH) INTi input “H” width, KIi input “H” width 380 (1) —ns tW(INL) INTi input “L” width, KIi input “L” width 380 (2) —ns tW(CKH) tC(CK) tW(CKL) th(C-Q) th(C-D) tsu(D-C) td(C-Q) CLKi TXDi RXDi VCC = 3 V i = 0 to 2 tW(INL) tW(INH) VCC = 3 V INTi input (i = 0 to 4) KIi input (i = 0 to 3) |
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