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LTC2655IGN-L12PBF Datasheet(PDF) 9 Page - Linear Technology

Part # LTC2655IGN-L12PBF
Description  Quad I짼C 16-/12-Bit Rail-to-Rail DACs with 10ppm/째C Max Reference
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2655IGN-L12PBF Datasheet(HTML) 9 Page - Linear Technology

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LTC2655
9
2655f
ELECTRICAL CHARACTERISTICS
LTC2655B-L16/LTC2655-L12/LTC2655B-H16/LTC2655-H12
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AC Performance
ts
Settling Time ( Note 10)
±0.024%(±1LSB at 12 Bits)
±0.0015%(±1LSB at 16 Bits)
3.9
9.1
μs
μs
Settling Time for 1LSB Step
±0.024%(±1LSB at 12 Bits)
±0.0015%(±1LSB at 16 Bits)
2.4
4.5
μs
μs
Voltage Output Slew Rate
1.8
V/μs
Capacitive Load Driving
1000
pF
Glitch Impulse (Note 11)
At Mid-Scale Transition, -L Option
4
nV•s
At Mid-Scale Transition, -H Option
7
nV•s
DAC to DAC Crosstalk (Note 12)
CREFCOMP = CREFIN/OUT = 0.22μF
0.5
nV•s
Multiplying Bandwidth
150
kHz
en
Output Voltage Noise Density
At f = 1kHz
At f = 10kHz
85
80
nV/√Hz
nV/√Hz
Output Voltage Noise
0.1Hz to 10Hz, Internal Reference (-L Options)
0.1Hz to 10Hz, Internal Reference (-H Options)
0.1Hz to 200KHz, Internal Reference (-L Options)
0.1Hz to 200KHz, Internal Reference (-H Options)
8
12
400
450
μVP-P
μVP-P
μVP-P
μVP-P
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V (LTC2655B-L16/LTC2655-L12), VCC = 4.5V to 5.5V (LTC2655B-H16,
LTC2655-H12), VOUT unloaded unless otherwise specified.
LTC2655B-L16/LTC2655-L12/LTC2655B-H16/LTC2655-H12 (see Figure 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSCL
SCL Clock Frequency
l
0
400
kHz
tHD(STA)
Hold Time (Repeated) Start Condition
l
0.6
μs
tLOW
Low Period of the SCL Clock Pin
l
1.3
μs
tHIGH
High Period of the SCL Clock Pin
l
0.6
μs
tSU(STA)
Set-Up Time for a Repeated Start Program
l
0.6
μs
tHD(DAT)
Data Hold Time
l
0
0.9
μs
tSU(DAT)
Data Set-Up Time
l
100
ns
tr
Rise Time of Both SDA and SCL Signals
(Note 13)
l
20+0.1CB
300
ns
tf
Fall Time of Both SDA and SCL Signals
(Note 13)
l
20+0.1CB
300
ns
tSU(STO)
Set-Up Time for Stop Condition
l
0.6
μs
tBUF
Bus Free Time Between a Stop and Start Condition
l
1.3
μs
t1
Falling edge of the 9th Clock of the 3rd Input Byte
to LDAC High or Low Transition
l
400
ns
t2
LDAC Low Pulse Width
l
20
ns
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V (LTC2655B-L16/LTC2655-L12), VCC = 4.5V to 5.5V
(LTC2655B-H16, LTC2655-H12), VOUT unloaded unless otherwise specified.


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