Rev 1.0

KM718FV4021

128Kx36 & 256Kx18 SRAM

- 6 -

KM736FV4021

Dec. 1998

Z0=50

Ω

50

Ω

1.25V

*Capacitive load consists of all components

AC TEST CONDITIONS

Parameter

Symbol

Value

Unit

Core Power Supply Voltage

3.15~3.45

V

Output Power Supply Voltage

2.4~2.6

V

Input High/Low Level

1.7/0.7

V

Clock Input High/Low Level(PECL)

2.4/1.5

V

Input Rise/Fall Time

1.0/1.0

ns

Clock Input Rise/Fall Time(PECL)

1.0/1.0

ns

Input and Out Timing Reference Level

1.25

V

Clock Input Timing Reference Level

Cross Point

V

AC TEST OUTPUT LOAD

Dout

of the tester environment

20pF*

AC CHARACTERISTICS

Parameter

Symbol

-5

-6

-7

Unit

Note

Min

Max

Min

Max

Min

Max

Clock Cycle Time

5.0

-

6.0

-

7.0

-

ns

Clock High Pulse Width

1.5

-

1.5

-

1.5

-

ns

Clock Low Pulse Width

1.5

-

1.5

-

1.5

-

ns

Clock High to Output Valid

-

2.5

-

3.0

-

3.5

ns

Clock High to Output Hold

0.5

-

0.5

-

0.5

-

ns

Address Setup Time

0.5

-

0.5

-

0.5

-

ns

Address Hold Time

1.0

-

1.0

-

1.0

-

ns

Write Data Setup Time

0.5

-

0.5

-

0.5

-

ns

Write Data Hold Time

1.0

-

1.0

-

1.0

-

ns

SW, SW[a:d] Setup Time

0.5

-

0.5

-

0.5

-

ns

SW, SW[a:d] Hold Time

1.0

-

1.0

-

1.0

-

ns

SS Setup Time

0.5

-

0.5

-

0.5

-

ns

SS Hold Time

1.0

-

1.0

-

1.0

-

ns

Clock High to Output Hi-Z

-

2.5

-

3.0

-

3.5

ns

Clock High to Output Low-Z

0.5

-

0.5

-

0.5

-

ns

G High to Output High-Z

-

2.5

-

3.0

-

3.5

ns

G Low to Output Low-Z

0.5

-

0.5

-

0.5

-

ns

G Low to Output Valid

-

2.5

-

3.0

-

3.5

ns

ZZ High to Power Down(Sleep Time)

-

5.0

-

6.0

-

7.0

ns

ZZ Low to Recovery(Wake-up Time)

-

5.0

-

6.0

-

7.0

ns

PIN CAPACITANCE

NOTE : Periodically sampled and not 100% tested.(dV=0V, f=1MHz)

Parameter

Symbol

Typ

Max

Unit

Input Capacitance

4

5

pF

Output Capacitance

7

8

pF