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S5C7212X Datasheet(PDF) 2 Page - Samsung semiconductor |
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S5C7212X Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 19 page S5C7212X01 TIMING & SYNC. GENERATOR FOR B/W CCD 2 PIN DESCRIPTION No Symbol I/O Description Remark 1 MD2 I CCIR/EIA mode selection * Information (1) 2 MD1 I NORMAL/MIRROR mode selection * Information (1) 3 EE1 I EE mode control input 1 * Information (2) 4 EE2 I EE mode control input 2 * Information (2) 5 VSS1 - Ground 6 VDD1 - +5V 7 FLD O Field separation pulse 8 PBLK O Pre - blanking pulse 9 CSYNC O Composite Sync.pulse 10 CBLK O Composite Blanking pulse 11 VD O Vertical driving pulse 12 HD O Horizontal driving pulse 13 WIN O Window pulse 14 CLEN O 1/2 HD frequency pulse 15 DFDO O 1/2 VD frequency pulse 16 CLP3 O Clamp pulse 3 (Dummy black level) 17 CLP2 O Clamp pulse 2 (Optical black level) 18 CLP1 O Clamp pulse 1 (Optical black level) 19 VSS2 - Ground 20 VDD2 - +5V 21 SHD O Data Sample & Hold pulse 22 SHP O Pre - Charge Sample & Hold pulse 23 VSS3 - Ground 24 XV4 O Vertical transfer clock 4 25 XSG3 O Read out Pulse 3 26 V3 O Vertical transfer clock 3 27 XSG1 O Read out Pulse 1 28 XV1 O Vertical transfer clock 1 29 XV2 O Vertical transfer clock 2 30 XSUB O Shutter speed control for auto iris 31 VDD3 - +5V 32 VSS4 - Ground |
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Similar Description - S5C7212X |
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