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S3P7335 Datasheet(PDF) 8 Page - Samsung semiconductor |
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S3P7335 Datasheet(HTML) 8 Page - Samsung semiconductor |
8 / 41 page PRODUCT OVERVIEW S3C7335/P7335 1-8 Table 1-1. S3C7335 Pin Descriptions (Concluded) Pin Name Pin Type Description Number Share Pin Reset Value Circuit Type BTCO I/O Basic timer overflow output signal 72 P0.0 Input D-2 TCLO0 I/O Timer/counter 0 clock output signal 73 P0.1 Input D-2 TCL0 I/O External clock input for timer/counter 0 74 P0.2 Input D-4 BUZ I/O 2,4,8 or 16 kHz frequency output for buzzer sound for 4.19 MHz main system clock or 32.768 kHz subsystem clock 75 P0.3 Input D-2 INT0 INT1 I External interrupt. The triggering edges (rising/falling) are selectable. Only INT0 is synchronized with system clock. 76 77 P1.0 P1.1 Input A-4 INT2 I Quasi-interrupt with detection of rising edge signal. 78 P1.2 INT4 I External interrupt input with detection of rising or falling edges. 79 P1.3 SCK I/O SIO interface clock signal 80 P4.0 Input D-4 SI I/O SIO interface data input signal 1 P4.2 SO I/O SIO interface data output signal 2 P4.1 CLO I/O CPU clock output 3 P4.3 KS0-KS3 I/O Quasi-interrupt input with falling edge detection 8-11 P6.0- P6.3 Input D-7 ADC0- ADC3 I/O ADC input ports. 4-7 P5.0- P5.3 Input F-10 SEG0- SEG3 O LCD segment signal output. 28-31 P7.0- P7.3 Output H-28 SEG4- SEG27 O LCD segment signal output. 32-55 P8-P13 Output H-28 |
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