PRODUCT OVERVIEW

S3C70F2/C70F4/P70F4

1-4

DATA MEMORY

Overview

Data memory is organized into three areas:

— 32

× 4-bit working registers

— 224

× 4-bit general-purpose area in bank 0

— 256

× 4-bit general-purpose area in bank 1

— 128

× 4-bit area in bank 15 for memory-mapped I/O addresses

Data stored in data memory can be manipulated by 1-, 4-, and 8-bit instructions.

Data memory is organized into two memory banks — bank 0, bank 1 and bank 15. The select memory bank in-

struction (SMB) selects the bank to be used as working data memory. After power-on reset operation,

initialization values for data memory must be redefined by code.

Data Memory Addressing Modes

The enable memory bank (EMB) flag controls the addressing mode for data memory banks 0, 1 or 15.

When the EMB flag is logic zero, restricted area can be accessed. When the EMB flag is set to logic one, all two

data memory banks can be accessed according to the current SMB value. The EMB = "0" addressing mode is

used for normal program execution, whereas the EMB = "1" mode is commonly used for interrupts, subroutines,

mapped I/O, and repetitive access of specific RAM addresses.

Working Registers

The RAM's working register area in data memory bank 0 is further divided into four register banks. Each register

bank has eight 4-bit registers that are addressable either by 1-bit or 4-bit instructions. Paired 4-bit registers can

be addressed as double registers by 8-bit instructions.

Register A is the 4-bit accumulator and double register EA is the 8-bit extended accumulator. Double registers

WX, WL, and HL are used as data pointers for indirect addressing. Unused working registers can be used as

general-purpose memory.

To limit the possibility of data corruption due to incorrect register bank addressing, register bank 0 is usually used

for the main program and banks 1, 2, and 3 for interrupt service routines.