Electronic Components Datasheet Search |
|
S3C7044 Datasheet(PDF) 23 Page - Samsung semiconductor |
|
S3C7044 Datasheet(HTML) 23 Page - Samsung semiconductor |
23 / 38 page ELECTRICAL DATA S3C7044/C7048/P7048 13-8 CPU CLOCK = 1/n x oscillator frequency (n = 4, 8, 64) 1 2 3 4 5 6 7 SUPPLY VOLTAGE (V) 1.05 kHz 1.5 MHz 15.625 kHz CPU CLOCK 4.2 MHz 6 MHz 400 kHz Main Osc. Freq. ( Divided by 4 ) Figure 13-1. Standard Operating Voltage Range Table 13-6. RAM Data Retention Supply Voltage in Stop Mode (TA = – 40 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit Data retention supply voltage V DDDR – 1.5 – 5.5 V Data retention supply current I DDDR V DDDR = 1.5 V – 0.1 10 µA Release signal set time t SREL – 0 – – µs Oscillator stabilization wait t WAIT Released by RESET – 217/fx – ms time (1) Released by interrupt – (2) – ms NOTES 1. During oscillator stabilization wait time, all CPU operations must be stopped to avoid instability during oscillator start-up. 2. Use the basic timer mode register (BMOD) interval timer to delay execution of CPU instructions during the wait time. |
Similar Part No. - S3C7044 |
|
Similar Description - S3C7044 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |