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S3C4510B Datasheet(PDF) 34 Page - Samsung semiconductor |
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S3C4510B Datasheet(HTML) 34 Page - Samsung semiconductor |
34 / 422 page PROGRAMMER'S MODEL S3C4510B 2-8 Accessing Hi-Registers in THUMB State In THUMB state, registers R8–R15 (the Hi registers) are not part of the standard register set. However, the assembly language programmer has limited access to them, and can use them for fast temporary storage. A value may be transferred from a register in the range R0–R7 (a Lo register) to a Hi register, and from a Hi register to a Lo register, using special variants of the MOV instruction. Hi register values can also be compared against or added to Lo register values with the CMP and ADD instructions. For more information, refer to Figure 3-34. THE PROGRAM STATUS REGISTERS The ARM7TDMI contains a Current Program Status Register (CPSR), plus five Saved Program Status Registers (SPSRs) for use by exception handlers. These register ′s functions are: — Hold information about the most recently performed ALU operation — Control the enabling and disabling of interrupts — Set the processor operating mode The arrangement of bits is shown in Figure 2-6. N Z C V . . . . . . I F T M4 M3 M2 M1 M0 31 30 29 28 27 26 25 24 8 7 6 5 4 3 2 1 0 Condition Code Flags (Reserved) Control Bits Overflow Carry/Borrow/Extend Zero Negative/Less Than Mode bits State bit FIQ disable IRQ disable Figure 2-6. Program Status Register Format |
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