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S1T8528 Datasheet(PDF) 6 Page - Samsung semiconductor |
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S1T8528 Datasheet(HTML) 6 Page - Samsung semiconductor |
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6 / 35 page  S1T8528 ENHANCED-1 CHIP CT0 RF IC 6 34 2MI Input terminal of mixer 2. Output from mixer 1 is entered to mixer 2 input terminal via 10.7MHz ceramic filter. Second mixer converts frequency to second intermediate frequency ( 455kHz: AM IF ). 35 2MO Output terminal of Mixer 2. Second intermediate frequency ( 455kHz ), generated by mixing first intermediate frequency ( 10.7MHz ) and Second Local Oscillator is output. 36 37 2LOI 2LOI Input terminal of second local oscillator. These pins generate 2’nd local oscillation frequency and are designed as colpitt type oscillator. 10.24MHz or 10.245MHz can be applied as for 2’nd local oscillator. 38 1MO Output terminal of mixer 1. The signal from mixer 1 and the frequency of the first local oscillator are mixed to produce the first intermediate frequency, which is the output through this terminal. The output terminal is an emitter follower with an output impedance of 330 Ω to match the 330 Ω input / output impedance of the 10.7MHz ceramic filter. 39 40 1LOI 1LOI Input terminal of the first local oscillator. The local oscillator is a voltage controlled oscillator. Local oscillation frequency and received frequency are mixed at mixer 1 and then converted to the first intermediate frequency of 10.7MHz or 10.695MHz. 41 VCORX The terminal which variable capacitor is included in the chip. Used as an input terminal where 1st local oscillation frequency is changed by varying the capacitor connected between 1st local oscillator terminals. The internal variable capacitor has the value of 18.73 ~ 15.86 pF depending on the applied voltage. ( 1.0 ~ 2.0V ) 42 43 1MI 1MI Input terminal of Mixer1. This mixer is made of doubly balanced multiplier. The received signal amplified at RF AMP is input to this terminal. 44 GND(PLL) Ground. Ground for analog at PLL. 45 PDR Phase detector output terminal of the receiver at PLL. If fRX > fREF or fRX is Leading → The output is negative pulse If fRX < fREF or fRX is Lagging → The output is positive pulse If fRX = fREF and the same phase → The output is high impedance 46 VREF(RF) An internal PMOS pass transistor provides power supplier for the RF pre amplifier. PMOS pass transistor is on in Active/Rx mode and off in Standby/Inactive mode. 47 VREF(PLL) PLL voltage reference output pin. An internal voltage regulator provides a stable power supply voltage for the RX and TX PLLs. (2.05V) 48 TIF Input terminal of TX channel counter. AC coupling with TX VCO. Minimum input level is 300 mVp-p ( at 60MHz ). PIN DESCRIPTION (Continued) Pin No Symbol Description |
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