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KS57C0404 Datasheet(PDF) 4 Page - Samsung semiconductor

Part No. KS57C0404
Description  The KS57C0404/C0408 single-chip CMOS microcontroller has been designed for very high-performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KS57C0404 Datasheet(HTML) 4 Page - Samsung semiconductor

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PRODUCT OVERVIEW
KS57C0404/C0408/P0408 MICROCONTROLLER
1–4
DATA MEMORY
Overview
The 512 x 4bit data memory has five areas:
 32 x 4-bit working register area
 224 x 4-bit general-purpose area in bank 0 which is also used as the stack area
 256 x 4-bit general-purpose area in bank 1
 128 x 4-bit area in bank 15 for memory-mapped I/O addresses
The data memory area is also organized as three memory banks
 bank0, bank1, and bank15. You use the
select memory bank instruction (SMB) to select one of the banks as working data memory.
Data stored in RAM location are 1-, 4-, and 8-bit addressable. After a hardware reset, data memory initialization
values must be defined by program code.
Data Memory addressing modes
The enable memory bank (EMB) flag controls the addressing mode for data memory banks 0, 1, or 15. When the
EMB flag is logic zero, only location 00H–7FH of bank 0 and bank 15 can be accessed. When the EMB flag is set
to logic one, all three data memory banks can be accessed based on the current SMB value.
Working registers
The RAM's working register area in data memory bank 0 is also divided into four register banks. Each register
bank has eight 4-bit registers. Paired 4-bit registers are 8-bit addressable.
Register A can be used as a 4-bit accumulator and double register EA as an 8-bit extended accumulator; double
registers WX, WL, and HL are used as address pointers for indirect addressing.
To limit the possibility of data corruption due to incorrect register addressing, it is advisable to use bank 0 for
main programs and banks 1, 2, and 3 for interrupt service routines.
Bit sequential carrier
The bit sequential carrier (BSC) mapped in data memory bank 15 is a 16-bit general register that you can
manipulate using 1-, 4-, and 8-bit RAM control instructions.
Using the BSC register, addresses and bit location can be specified sequentially using 1-bit indirect addressing
instructions. In this way, a program can generate 16-bit data output by moving the bit location sequentially,
incrementing or decrementing the value of the L register. You can also use direct addressing to manipulate data
in the BSC.


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