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KM44C4103C Datasheet(PDF) 5 Page - Samsung semiconductor

Part # KM44C4103C
Description  4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM44C4103C Datasheet(HTML) 5 Page - Samsung semiconductor

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CMOS DRAM
KM44C4003C, KM44C4103C
CAPACITANCE (TA=25
°C, VCC=5V, f=1MHz)
Parameter
Symbol
Min
Max
Units
Input capacitance [A0 ~ A11]
CIN1
-
5
pF
Input capacitance [RAS, CASx, W, OE]
CIN2
-
7
pF
Output capacitance [DQ0 - DQ3]
CDQ
-
7
pF
Test condition : VCC=5.0V
±10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.4/0.4V
Parameter
Symbol
-5
-6
Units
Notes
Min
Max
Min
Max
Random read or write cycle time
tRC
90
110
ns
Read-modify-write cycle time
tRWC
133
155
ns
Access time from RAS
tRAC
50
60
ns
3,4,10
Access time from CAS
tCAC
13
15
ns
3,4,5,18
Access time from column address
tAA
25
30
ns
3,10
CAS to output in Low-Z
tCLZ
0
0
ns
3,18
Output buffer turn-off delay
tOFF
0
13
0
15
ns
6
Transition time (rise and fall)
tT
3
50
3
50
ns
2
RAS precharge time
tRP
30
40
ns
RAS pulse width
tRAS
50
10K
60
10K
ns
RAS hold time
tRSH
13
15
ns
14
CAS hold time
tCSH
50
60
ns
17
CAS pulse width
tCAS
13
10K
15
10K
ns
23
RAS to CAS delay time
tRCD
20
37
20
45
ns
4,16
RAS to column address delay time
tRAD
15
25
15
30
ns
10
CAS to RAS precharge time
tCRP
5
5
ns
15
Row address set-up time
tASR
0
0
ns
Row address hold time
tRAH
10
10
ns
Column address set-up time
tASC
0
0
ns
16
Column address hold time
tCAH
10
10
ns
16
Column address to RAS lead time
tRAL
25
30
ns
Read command set-up time
tRCS
0
0
ns
Read command hold time referenced to
tRCH
0
0
ns
8,15
Read command hold time referenced to
tRRH
0
0
ns
8
Write command hold time
tWCH
10
10
ns
14
Write command pulse width
tWP
10
10
ns
Write command to RAS lead time
tRWL
13
15
ns
Write command to CAS lead time
tCWL
13
15
ns
17
AC CHARACTERISTICS (0
°C≤TA≤70°C, See note 1,2)


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