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KM416S8030B Datasheet(PDF) 6 Page - Samsung semiconductor

Part No. KM416S8030B
Description  128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM416S8030B Datasheet(HTML) 6 Page - Samsung semiconductor

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KM416S8030B
Rev. 0.1 Jun. 1999
CMOS SDRAM
DC CHARACTERISTICS
1. Measured with outputs open.
2. Refresh period is 64ms.
3. KM416S8030B-G**
4. KM416S8030B-F**
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
Notes :
(Recommended operating condition unless otherwise noted, TA = 0 to 70
°C)
Parameter
Symbol
Test Condition
Version
Unit Note
-A
-8
-H
-L
-10
Operating current
(One bank active)
ICC1
Burst length = 1
tRC
≥ tRC(min)
IO = 0 mA
150
150
140
140
140
mA
1
Precharge standby current in
power-down mode
ICC2P
CKE
≤ VIL(max), tCC = 10ns
1
mA
ICC2PS
CKE & CLK
≤ VIL(max), tCC = ∞
1
Precharge standby current in
non power-down mode
ICC2N
CKE
≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
20
mA
ICC2NS
CKE
≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
7
Active standby current in
power-down mode
ICC3P
CKE
≤ VIL(max), tCC = 10ns
5
mA
ICC3PS
CKE & CLK
≤ VIL(max), tCC = ∞
5
Active standby current in
non power-down mode
(One bank active)
ICC3N
CKE
≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
30
mA
ICC3NS
CKE
≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
20
mA
Operating current
(Burst mode)
ICC4
IO = 0 mA
Page burst
4Banks Activated
tCCD = 2CLKs
180
170
145
145
145
mA
1
Refresh current
ICC5
tRC
≥ tRC(min)
220
220
210
210
210
mA
2
Self refresh current
ICC6
CKE
≤ 0.2V
G
1.5
mA
3
F
800
uA
4


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