K6T4008U1C-VF85 datasheet(7/10 Pages) SAMSUNG

Part #	K6T4008U1C-VF85

Description	512Kx8 bit Low Power and Low Voltage CMOS Static RAM

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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7 / 10 page

K6T4008V1C, K6T4008U1C Family

CMOS SRAM

Revision 1.0

January 1999

7

TIMING WAVEFORM OF WRITE CYCLE(1) (WE Controlled)

Address

CS

tCW(2)

tWR(4)

TIMING WAVEFORM OF WRITE CYCLE(2) (CS Controlled)

Address

CS

tWC

tWR(4)

tAS(3)

tWP(1)

tDW

tDH

tOW

tWHZ

Data Undefined

Data Valid

WE

Data in

Data out

tDW

tDH

Data Valid

WE

Data in

Data out

High-Z

tWC

tAW

tAS(3)

tCW(2)

tWP(1)

tAW

NOTES (WRITE CYCLE)

1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE

going low : A write end at the earliest transition among CS going high and WE going high, tWP is measured from the begining of write

to the end of write.

2. tCW is measured from the CS going low to end of write.

3. tAS is measured from the address valid to the beginning of write.

4. tWR is measured from the end of write to the address change. tWR applied in case a write ends as CS or WE going high.

DATA RETENTION WAVE FORM

CS controlled

VCC

3.0/2.7V

2.2V

VDR

CS

GND

Data Retention Mode

CS

≥VCC - 0.2V

tSDR

tRDR

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