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K4F171611D Datasheet(PDF) 1 Page - Samsung semiconductor

Part No. K4F171611D
Description  1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
Download  34 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K4F171611D Datasheet(HTML) 1 Page - Samsung semiconductor

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K4F171611D, K4F151611D
CMOS DRAM
K4F171612D, K4F151612D
This is a family of 1,048,576 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-50 or -60), power
consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-
before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This
1Mx16 Fast Page Mode DRAM family is fabricated using Samsung
′s advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
• Part Identification
- K4F171611D-J(T) (5V, 4K Ref.)
- K4F151611D-J(T) (5V, 1K Ref.)
- K4F171612D-J(T) (3.3V, 4K Ref.)
- K4F151612D-J(T) (3.3V, 1K Ref.)
• Fast Page Mode operation
• 2 CAS Byte/Word Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in 42-pin SOJ 400mil and 50(44)-pin TSOP(II)
400mil packages
• Single +5V
±10% power supply (5V product)
• Single +3.3V
±0.3V power supply (3.3V product)
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Column Decoder
Lower
Data out
Buffer
RAS
UCAS
LCAS
W
Vcc
Vss
DQ0
to
DQ7
A0-A11
(A0 - A9)*1
A0 - A7
(A0 - A9)*1
Memory Array
1,048,576 x16
Cells
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
• Refresh Cycles
Part
NO.
VCC
Refresh
cycle
Refresh period
Normal
L-ver
K4F171611D
5V
4K
64ms
128ms
K4F171612D
3.3V
K4F151611D
5V
1K
16ms
K4F151612D
3.3V
• Perfomance Range
Speed
tRAC
tCAC
tRC
tPC
Remark
-50
50ns
15ns
90ns
35ns
5V/3.3V
-60
60ns
15ns
110ns
40ns
5V/3.3V
• Active Power Dissipation
Speed
3.3V
5V
4K
1K
4K
1K
-50
324
504
495
770
-60
288
468
440
715
Unit : mW
Upper
Data in
Buffer
Upper
Data out
Buffer
Lower
Data in
Buffer
DQ8
to
DQ15
OE
Note) *1 : 1K Refresh


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