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K4D263238F Datasheet(PDF) 4 Page - Samsung semiconductor

Part No. K4D263238F
Description  1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL
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Maker  SAMSUNG [Samsung semiconductor]
Homepage  http://www.samsung.com/Products/Semiconductor
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K4D263238F Datasheet(HTML) 4 Page - Samsung semiconductor

 
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128M DDR SDRAM
K4D263238F
- 4 -
Rev 1.1 (May 2003)
PIN CONFIGURATION (Top View)
PIN DESCRIPTION
CK,CK
Differential Clock Input
BA0, BA1
Bank Select Address
CKE
Clock Enable
A0 ~A11
Address Input
CS
Chip Select
DQ0 ~ DQ31
Data Input/Output
RAS
Row Address Strobe
VDD
Power
CAS
Column Address Strobe
VSS
Ground
WE
Write Enable
VDDQ
Power for DQs
DQS
Data Strobe
VSSQ
Ground for DQs
DMi
Data Mask
MCL
Must Connect Low
RFU
Reserved for Future Use
DQ29
VSSQ
DQ30
DQ31
VSS
VDDQ
N.C
N.C
N.C
N.C
N.C
VSSQ
RFU
DQS
VDDQ
VDD
DQ0
DQ1
VSSQ
DQ2
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
A7
A6
A5
A4
VSS
A9
N.C
N.C
N.C
N.C
N.C
N.C
N.C
A11
A10
VDD
A3
A2
A1
A0
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
100 Pin TQFP
20 x 14 mm2
0.65mm pin Pitch


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