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RV5C387A-E2 Datasheet(PDF) 32 Page - RICOH electronics devices division

Part No. RV5C387A-E2
Description  I2C-bus Real-Time Clock ICs with Voltage Monitoring Function?
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Manufacturer  RICOH [RICOH electronics devices division]
Direct Link  http://www.ricoh.com
Logo RICOH - RICOH electronics devices division

RV5C387A-E2 Datasheet(HTML) 32 Page - RICOH electronics devices division

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RV5C387A
PRELIMINARY
12345
- 32 -
The above two types of interrupt signals are monitored by the flag bits (i.e. the WAFG, DAFG, and CTFG bits
in the Control Register 2) and enabled or disabled by the enable bits (i.e. the WALE, DALE, CT2, CT1, and
CT0 bits in the Control Register 1) as listed in the table below.
Flag bits
Enable bits
Output Pin
Alarm_W
WAFG
(D1 at Address Fh)
WALE
(D7 at Address Eh)
/INTRB
Alarm_D
DAFG
(D0 at Address Fh)
DALE
(D6 at Address Eh)
/INTRC
Peridic
Interrupt
CTFG
(D2 at Address Fh)
CT2=CT1=CT0=0
(These bit setting of “0” disable the Periodic Interrupt)
(D2 to D0 at Address Eh)
/INTRA
* At power-on, when the WALE, DALE, CT2, CT1, and CT0 bits are set to 0 in the Control Register 1, the
/INTRA, /INTRB, and /INTRC pins are driven high (disabled).
14.4.1.
Alarm Interrupt
The alarm interrupt circuit is controlled by the enable bits (i.e. the WALE and DALE bits in the Control
Register 1) and the flag bits (i.e. the WAFG and DAFG bits in the Control Register 2).
The enable bits can
be used to enable this circuit when set to 1 and to disable it when set to 0.
When intended for reading, the
flag bits can be used to monitor alarm interrupt signals.
When intended for writing, the flag bits will cause no
event when set to 1 and will drive high (disable) the alarm interrupt circuit when set to 0.
The enable bits will not be affected even when the flag bits are set to 0.
In this event, therefore, the alarm
interrupt circuit will continue to function until it is driven low (enabled) upon the next occurrence of a match
between current time and preset alarm time.
The alarm function can be set by presetting desired alarm time in the alarm registers (the Alarm_W Registers
for the day-of-week digit settings and both the Alarm_W Registers and the Alarm_D Registers for the hour
and minute digit settings) with the WALE and DALE bits once set to 0 and then to 1 in the Control Register 1.
Note that the WALE and DALE bits should be once set to 0 in order to disable the alarm interrupt circuit upon
the coincidental occurrence of a match between current time and preset alarm time in the process of setting
the alarm function.
current time =
preset alarm time
WALE
←1
(DALE)
WALE
←0
(DALE)
Interval (1min.) during which a match
between current time and preset alarm time
occurs
current time =
preset alarm time
WAFG
←0
(DAFG)
Max.61.1
µs
/INTRB
(/INTRC)
WALE
←1
(DALE)
WALE
←1
(DALE)
current time =
preset alarm time
WALE
←0
(DALE)
current time =
preset alarm time
/INTRB
(/INTRC)


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