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RV5C386A Datasheet(PDF) 31 Page - RICOH electronics devices division |
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RV5C386A Datasheet(HTML) 31 Page - RICOH electronics devices division |
31 / 42 page ![]() PRELIMINARY RV5C386A 12345 - 31 - < Considerations in Using Oscillation Halt Sensing Circuit > Be sure to prevent the oscillation halt sensing circuit from malfunctioning by preventing the following: 1) Instantaneous power-down on the VDD 2) Condensation on the crystal oscillator 3) On-board noise to the crystal oscillator 4) Applying to individual pins voltage exceeding their respective maximum ratings In particular, note that the XSTP bit may fail to be set to 1 in the presence of any applied supply voltage as illustrated below in such events as backup battery installation. Further, give special considerations to prevent excessive chattering in the oscillation halt sensing circuit. VDD < Supply Voltage Sensing Circuit > The Supply voltage monitoring circuit is configured to conduct a sampling operation during an interval of 7.8ms per second to check for a drop in supply voltage below a threshold voltage of 2.1 or 1.6v for the VDSL bit setting of 0 (the default setting) or 1, respectively, in the Control Register 2, thus minimizing supply current requirements as illustrated in the timing chart below. This circuit suspends a sampling operation once the VDET bit is set to 1 in the Control Register 2. VDET (D6 at Address Fh) XSTP VDD Threshold voltage of 2.1 or 1.6v 1s VDET ←0 7.8ms Sampling operation by supply voltage monitoring circuit Internal initiali- zation period (1 to 2 sec.) XSTP, VDET ←0 |
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