RS5C338A datasheet(14/51 Pages) RICOH

Part #	RS5C338A

Description	3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MONITORING FUNCTION

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Manufacturer	RICOH [RICOH electronics devices division]

Direct Link	http://www.ricoh.com

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11

RS5C338A

2.1-5 CT2, CT1, and CT0

1) Pulse Mode : 2-Hz and 1-Hz clock pulses are output in synchronization with the increment of the second counter

as illustrated in the timing chart on the next page.

TEST

Description

0

Normal operation mode

1

Test mode

2.1-4 TEST

Test Bit

(Default setting)

The TEST bit is used only for testing in the factory and should normally be set to 0.

Periodic Interrupt Selection Bits

CT2

CT1

CT0

Description

Waveform mode

Interrupt cycle and falling timing

0

—

Off (“H”)

0

1

—

Fixed at low (“L”)

0

1

0

Pulse mode

2Hz (Duty cycle of 50%)

0

1

Pulse mode

1Hz (Duty cycle of 50%)

1

0

Level mode

Once per 1 second (Synchronized with second counter increment)

1

0

1

Level mode

Once per minute (at 00 seconds of every minute)

1

0

Level mode

Once per hour (at 00 minutes and 00 seconds of every hour)

1

Level mode

Once per month (at 00 hours, 00 minutes, and 00 seconds of first day of every month)

(Default setting)

2.1-3 CLEN2

32-kHz Clock Output Bit 2

CLEN2

Description

0

Enabling the 32-kHz clock circuit

1

Disabling the 32-kHz clock circuit

(Default setting)

For the RS5C338A, setting the CLEN2 bit or the CLEN1 bit (D3 in the control register 2) to 0, and the CLKC pin to

high specifies generating clock pulses with the oscillation frequency of the 32.768-kHz crystal oscillator for output

from the 32KOUT pin. Conversely, setting both the CLEN1 and the CLEN2 bit to 1 or CLKC pin to low specifies

disabling (“L”) such output.

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RS5C338A Datasheet(PDF) 14 Page - RICOH electronics devices division

RS5C338A Datasheet(HTML) 14 Page - RICOH electronics devices division

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