Preliminary
8-128
RF2461
Rev A13 010607
8
Application Schematic
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
20
19
18
17
16
VCC1
100 pF
33 nF
16 nH
4.3 nH
IF SEL
100 pF
56
Ω
L2
100 pF
C2
L1
R
C1
C1
100 pF
C2
L1
R
C1
C1
L2
VCC1
100 pF
50
Ωµstrip
620
Ω
4pF
100 pF
0.1
µF
VCC1
22 k
Ω 47 kΩ 3.3 nH
LNA GAIN
MIX GAIN
VCC2
VCC1
NOTE:
Microstrip Inductor, Z
0 =50 Ω, L = 102 mils
suggested compared values.
51
Ω*
Filter
33 nF
47 nH
L
Filter
IF+
IF-
L
Filter
IF2+
IF2-
LO IN
LNA IN
7.5 nH
50
Ωµstrip
L=130 mils
W=12 mils
Z
0=50 Ω
ENABLE
IP SET
*This resistor improves NF and IIP3 for
V
CC =3.0 V.
BYPASS
51
Ω
Output Interface Network
L1, C1, and R form a current combiner which performs
a differential to single-ended conversion at the IF fre-
quency and sets the output impedance. In most cases,
the resonance frequency is independent of R and can
be set according to the following equation:
Where CEQ is the equivalent stray capacitance and
capacitancelookingintopins11and 12.Anaverage
valuetouse for CEQ is 2.5pF to 3pF.
R can then be used to set the output impedance
according to the following equation:
where ROUT is the desired output impedance and RP is
the parasitic equivalent parallel resistance of L1.
C1 should be chosen as high as possible (not greater
than 15pF), while maintaining an RP of L1 that allows
for the desired ROUT.
L2 and C2 serve dual purposes. L2 serves as an out-
put bias choke, and C2 serves as a series DC block.
In addition, L2 and C2 may be chosen to form an
impedance matching network if the input impedance of
the IF filter is not equal to ROUT. Otherwise, L2 is cho-
sen to be large, and C2 is chosen to be large if a DC
path to ground is present in the IF filter, or omitted if the
filter is DC blocked.
1
2
π
L1
2
(C1+C
EQ)
f
IF =
R=
1
4R
OUT
- 1
R
P
()
-1
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