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EZANCE101M Datasheet(PDF) 5 Page - Panasonic Semiconductor

Part # EZANCE101M
Description  Chip 3-Terminal Capacitor Array
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Manufacturer  PANASONIC [Panasonic Semiconductor]
Direct Link  http://www.panasonic.com/industrial/
Logo PANASONIC - Panasonic Semiconductor

EZANCE101M Datasheet(HTML) 5 Page - Panasonic Semiconductor

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Chip 3-Terminal Capacitor Array
Design and specifications are each subject to change without notice. Ask factory for the current technical specifications before purchase and/or use.
Should a safety concern arise regarding this product, please be sure to contact us immediately.
Preheating
Peak
Heating
Time
The following are precautions for individual products. Please also refer to the precautions common to EMI Filters,
Fuses, and Sensors(MR Elements) shown on page EX2 of this catalog.
1. Take measures against mechanical stress during and after mounting of Chip 3-Terminal Capacitor Array (hereafter
called the capacitor arrays) so as not to damage their electrodes and protective coatings.
Be careful not to misplace the capacitor arrays on the land patterns. Otherwise, solder bridging may occur.
2. Do not use halogen-based or other high-activity flux. Otherwise, the residue may impair the capacitors arrays'
performance and/or reliability.
3. When soldering with a soldering iron, never touch the capacitor arrays' bodies with the tip of the soldering iron. When
using a soldering iron with a high temperature tip, finish soldering as quickly as possible (within three seconds at 350 °
C max.).
4. As the amount of applied solder becomes larger, the mechanical stress applied to the capacitor arrays increases,
causing problems such as cracks and faulty characteristics. Avoid applying an excessive amounts of solder.
5. Do not apply shock to the capacitor arrays or pinch them with a hard tool (e.g. pliers and tweezers). Otherwise, the
capacitor arrays' protective coatings and bodies may be chipped, affecting their performance.
6. Avoid excessive bending of printed circuit boards in order to protect the capacitor arrays from abnormal stress.
7. The static capacitance may decrease by a few percent from the time of shipment due to the characteristics peculiar to
dielectric materials having a high dielectric constant.
● Recommended soldering conditions for reflow
Recommended Soldering Conditions
Recommendations and precautions are described below.
● Flow Soldering
We do not recommend flow soldering to the Chip 3-Terminal Capacitor Array: EZASC, because solder
bridging may occur due to the narrow 0.8 mm pitch of EZASC. Please contact us regarding flow soldering
of EZANC type.
Safety Precautions
·Reflow soldering shall be performed a maximum of
two times.
·Please contact us for additional information when
used in conditions other than those specified.
·Please measure the temperature of the terminals and
study every kind of solder and printed circuit board
for solderability before actual use.
For soldering (Example : Sn/Pb)
Temperature
Time
Preheating
140 °C to 160 °C
60 s to 120 s
Main heating
Above 200 °C
30 s to 40 s
Peak
235 ± 5 °C
max. 10 s
Temperature
Time
Preheating
150 °C to 180 °C
60 s to 120 s
Main heating
Above 230 °C
30 s to 40 s
Peak
max. 260 °C
max. 10 s
For lead-free soldering (Example : Sn/Ag/Cu)
Feb. 2006


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