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SSTUH32865 Datasheet(PDF) 19 Page - NXP Semiconductors |
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SSTUH32865 Datasheet(HTML) 19 Page - NXP Semiconductors |
19 / 28 page 9397 750 14136 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 11 March 2005 19 of 28 Philips Semiconductors SSTUH32865 1.8 V high output drive DDR registered buffer with parity VID = 600 mV VREF =VDD/2 VIH =VREF + 250 mV (AC voltage levels) for differential inputs. VIH =VDD for LVCMOS inputs. VIL =VREF − 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs. Fig 11. Voltage waveforms; setup and hold times tPLH and tPHL are the same as tPD. Fig 12. Voltage waveforms; propagation delay times (clock to output) tPLH and tPHL are the same as tPD. VIH =VREF + 250 mV (AC voltage levels) for differential inputs. VIH =VDD for LVCMOS inputs. VIL =VREF − 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs. Fig 13. Voltage waveforms; propagation delay times (reset to output) tsu VIH VIL VID th CK CK input VREF VREF VICR 002aaa374 VOH VOL output tPLH 002aaa375 VTT VICR VICR tPHL CK CK Vi(p-p) tPHL 002aaa376 LVCMOS RESET output VTT VDD/2 VIH VIL VOH VOL |
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