PCS3P7303A

Rev. 2 | Page 6 of 10 | www.onsemi.com

Switching Waveforms

Duty Cycle Timing

Output Rise/Fall Time

Application Schematic

Note: For AC Coupled Interface refer to Application Brief: CT100801.

OUTPUT

20%

80%

20%

80%

OUTPUT

Note: FS (Pin#3) MR (Pin#6): Connect to VDD or GND

Refer to Pin Description table for Functionality details.

Analog Deviation Control

SSEXTR can be Pulled HIGH

to turn OFF Deviation.

XIN/CLKIN

XOUT

SSEXTR

ModOUT

FS

GND

1

2

3

4

5

7

8

VDD

MR

6

VDD

0

0

CLKIN

0

VDD

0

R

External Deviation Control

0.1uF

R

C

VDD

Noise Reduction Filter