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EP3SE110 Datasheet(PDF) 29 Page - Altera Corporation |
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EP3SE110 Datasheet(HTML) 29 Page - Altera Corporation |
29 / 341 page Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics 1–19 Switching Characteristics © July 2010 Altera Corporation Stratix III Device Handbook, Volume 2 M144K (3), (4) True dual-port 16K × 9 or 8K × 18 0 1 350 300 245 245 180 280 245 170 MHz True dual-port 4K × 36 0 1 520 430 365 365 250 405 365 235 MHz Simple dual-port 16K × 9 or 8K × 18 0 1 350 300 245 245 180 280 245 170 MHz Simple dual-port 4K × 36 or 2K × 72 0 1 565 470 395 395 225 440 395 210 MHz ROM 1Port 0 1 580 470 425 425 260 470 425 260 MHz ROM 2 Port 0 1 545 450 380 380 260 425 380 245 MHz Single-port 16K × 9 or 8K × 18 0 1 385 330 270 270 240 310 270 195 MHz Single-port 4K × 36 0 1 580 470 425 425 210 470 425 195 MHz True dual-port 16K × 9, 8K × 18, or 4K × 36 with read-during-write option set to Old Data 0 1 325 270 225 225 165 255 225 155 MHz Simple dual-port 16K × 9, 8K × 18, 4K × 36, or 2K × 72 with read-during-write option set to "Old Data" 0 1 350 292 250 250 200 275 250 190 MHz Simple dual-port 2K × 64 (with ECC) 0 1 255 210 180 180 130 195 180 120 MHz Min Pulse Width (Clock High Time) — — 800 1000 1100 1100 1800 1000 1100 1800 ps Min Pulse Width (Clock Low Time) — — 500 625 690 690 1100 625 690 1100 ps M144K (3), (5) True dual-port 16K × 9 or 8K × 18 0 1 425 360 300 300 210 340 300 195 MHz True dual-port 4K × 36 0 1 520 430 365 365 250 405 365 235 MHz Simple dual-port 16K × 9 or 8K × 18 0 1 425 360 300 300 210 340 300 195 MHz Simple dual-port 4K × 36 or 2K × 72 0 1 565 470 395 395 225 440 395 210 MHz ROM 1Port 0 1 580 470 425 425 260 470 425 260 MHz ROM 2 Port 0 1 545 450 380 380 260 425 380 245 MHz Single-port 16K × 9 or 8K × 18 0 1 475 405 335 335 210 380 335 195 MHz Single-port 4K × 36 0 1 580 470 425 425 210 470 425 195 MHz True dual-port 16K × 9, 8K × 18, or 4K × 36 with read-during-write option set to Old Data 0 1 325 270 225 225 165 255 225 155 MHz Simple dual-port 16K × 9, 8K × 18, 4K × 36, or 2K × 72 with read-during-write option set to Old Data 0 1 350 292 250 250 200 275 250 190 MHz Table 1–22. TriMatrix Memory Block Performance Specifications for Stratix III Devices (Note 1) (Part 2 of 3) Memory Block Type Mode ALUTs TriMatrix Memory C2 (6) C3 C4 C4L I3 I4 I4L Unit V CCL = 1.1 V V CCL = 1.1 V V CCL = 1.1 V V CCL = 1.1 V V CCL = 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V |
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