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EP3SE80 Datasheet(PDF) 36 Page - Altera Corporation

Part No. EP3SE80
Description  Stratix III Device Handbook, Volume 2
Download  341 Pages
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Maker  ALTERA [Altera Corporation]
Homepage  http://www.altera.com
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EP3SE80 Datasheet(HTML) 36 Page - Altera Corporation

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1–26
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
Switching Characteristics
Stratix III Device Handbook, Volume 2
© July 2010
Altera Corporation
.
Table 1–28. Sampling Window (SW)—Read Side (Note 1)
Memory Type
I/O
Standard
Width
C2
C3, I3
C4, I4
C4L, I4L
C4L, I4L
VCCL = 1.1 V
VCCL = 1.1 V
VCCL = 1.1 V
VCCL = 1.1 V
VCCL = 0.9 V
SW (ps)
SW (ps)
SW (ps)
SW (ps)
SW (ps)
Setup
Hold
Setup
Hold
Setup
Hold
Setup
Hold
Setup
Hold
DDR3 SDRAM (with 8 or
10 tap phase offset,
300 MHz–400 MHz)
1.5-V
SSTL
×4, ×8
172
296
234
296
257
311
257
311
257
311
DDR3 SDRAM (with
Deskew circuitry,
401 MHz–533 MHz)
1.5-V
SSTL
×4, ×8
300
213
————————
DDR3 SDRAM
(Non-leveling interface)
1.5-V
SSTL
×4, ×8
172
296
234
296
257
311
257
311
257
311
DDR2 SDRAM Differential
DQS
1.8-V
SSTL
×4, ×8
181
306
234
326
257
326
257
326
257
326
DDR2 SDRAM
Single-ended DQS
1.8-V
SSTL
×4, ×8
231
256
284
276
307
276
307
276
307
276
DDR SDRAM
Single-ended DQS
2.5-V
SSTL
×4, ×8
231
256
284
261
307
261
307
261
307
261
QDRII/II+ SRAM
1.5-V
HSTL
×9, ×18,
×36
261
286
314
291
337
291
337
291
337
291
QDRII/II+ SRAM
Emulation (2)
1.5-V
HSTL
×36
261
328
314
337
337
350
337
350
337
350
QDRII/II+ SRAM
1.8-V
HSTL
×9, ×18,
×36
261
286
314
291
337
291
337
291
337
291
QDRII/II+ SRAM
Emulation (2)
1.8-V
HSTL
×36
261
328
314
337
337
350
337
350
337
350
RLDRAM II
1.5-V
HSTL
×9, ×18
211
336
264
356
287
356
287
356
287
356
RLDRAM II
1.8-V
HSTL
×9, ×18
211
336
264
356
287
356
287
356
287
356
Notes to Table 1–28:
(1) The values apply to Column I/Os, Row I/Os and Hybrid mode interface. Column I/Os refer to top and bottom I/Os. Hybrid mode refers to DQ/DQS groups
wrapping over Column I/Os and Row I/Os of the device.
(2) For implementation, refer to the “Supporting ×36 QDRII+/QDRII SRAM Interfaces in the F780 and F1152-Pin Packages” section in the External Memory
Interfaces in Stratix III Devices chapter.


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